HD6473927F datasheet, PDF - EEWORLD Datasheet

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HD6473927F: DescriptionMicrocontroller, 8-Bit, OTPROM, CMOS, PQFP80, QFP-80; CategoryMicrocontrollers and processors; File Size1MB，453 Pages; ManufacturerHitachi （Renesas ）; Websitehttp://www.renesas.com/eng/

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HD6473927F Overview

Microcontroller, 8-Bit, OTPROM, CMOS, PQFP80, QFP-80

HD6473927F Parametric

Parameter Name	Attribute value
Maker	Hitachi （Renesas ）
Parts packaging code	QFP
package instruction	QFP,
Contacts	80
Reach Compliance Code	unknown
Has ADC	YES
Address bus width
bit size	8
maximum clock frequency	10 MHz
DAC channel	YES
DMA channel	NO
External data bus width
JESD-30 code	R-PQFP-G80
length	20 mm
Number of I/O lines	68
Number of terminals	80
Maximum operating temperature	75 °C
Minimum operating temperature	-20 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	QFP
Package shape	RECTANGULAR
Package form	FLATPACK
Certification status	Not Qualified
ROM programmability	OTPROM
Maximum seat height	3.1 mm
Maximum slew rate	30 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	2.5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL EXTENDED
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	QUAD
width	14 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER
Base Number Matches	1

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OMC942723159

H8/3927 Series

H8/3927, H8/3926, H8/3925, H8/3924

Hardware Manual

Contents

Section 1

1.1

1.2

1.3

Overview

.........................................................................................................

Overview.........................................................................................................................

Internal Block Diagram ..................................................................................................

Pin Arrangement and Functions .....................................................................................

1.3.1 Pin Arrangement.................................................................................................

1.3.2 Pin Functions ......................................................................................................

Section 2

2.1

CPU

................................................................................................................... 13

2.2

2.3

2.4

2.5

2.6

2.7

2.8

Overview.........................................................................................................................

2.1.1 Features...............................................................................................................

2.1.2 Address Space.....................................................................................................

2.1.3 Register Configuration........................................................................................

Register Descriptions......................................................................................................

2.2.1 General Registers................................................................................................

2.2.2 Control Registers ................................................................................................

2.2.3 Initial Register Values ........................................................................................

Data Formats...................................................................................................................

2.3.1 Data Formats in General Registers .....................................................................

2.3.2 Memory Data Formats........................................................................................

Addressing Modes ..........................................................................................................

2.4.1 Addressing Modes ..............................................................................................

2.4.2 Effective Address Calculation ............................................................................

Instruction Set.................................................................................................................

2.5.1 Data Transfer Instructions ..................................................................................

2.5.2 Arithmetic Operations ........................................................................................

2.5.3 Logic Operations ................................................................................................

2.5.4 Shift Operations ..................................................................................................

2.5.5 Bit Manipulations ...............................................................................................

2.5.6 Branching Instructions........................................................................................

2.5.7 System Control Instructions ...............................................................................

2.5.8 Block Data Transfer Instruction .........................................................................

Basic Operational Timing...............................................................................................

2.6.1 Access to On-Chip Memory (RAM, ROM) .......................................................

2.6.2 Access to On-Chip Peripheral Modules .............................................................

CPU States ......................................................................................................................

2.7.1 Overview.............................................................................................................

2.7.2 Program Execution State ...................................................................................

2.7.3 Program Halt State..............................................................................................

2.7.4 Exception-Handling State...................................................................................

Memory Map ..................................................................................................................

2.8.1 Memory Map ......................................................................................................

2.9

Application Notes ...........................................................................................................

2.9.1 Notes on Data Access .........................................................................................

2.9.2 Notes on Bit Manipulation..................................................................................

2.9.3 Notes on Use of the EEPMOV Instruction.........................................................

Section 3

3.1

3.2

Exception Handling

...................................................................................... 57

3.3

3.4

Overview.........................................................................................................................

Reset ............................................................................................................................

3.2.1 Overview.............................................................................................................

3.2.2 Reset Sequence ...................................................................................................

3.2.3 Interrupt Immediately after Reset.......................................................................

Interrupts.........................................................................................................................

3.3.1 Overview.............................................................................................................

3.3.2 Interrupt Control Registers .................................................................................

3.3.3 External Interrupts ..............................................................................................

3.3.4 Internal Interrupts ...............................................................................................

3.3.5 Interrupt Operations............................................................................................

3.3.6 Interrupt Response Time.....................................................................................

Application Notes ...........................................................................................................

3.4.1 Notes on Stack Area Use ....................................................................................

3.4.2 Notes on Rewriting Port Mode Registers ...........................................................

Section 4

4.1

Clock Pulse Generators

............................................................................... 83

4.2

4.3

4.4

4.5

Overview.........................................................................................................................

4.1.1 Block Diagram....................................................................................................

4.1.2 System Clock and Subclock ...............................................................................

System Clock Generator .................................................................................................

Subclock Generator ........................................................................................................

Prescalers ........................................................................................................................

Note on Oscillators .........................................................................................................

Section 5

5.1

5.2

Power-Down Modes

..................................................................................... 91

5.3

5.4

Overview......................................................................................................................... 91

5.1.1 System Control Registers ................................................................................... 94

Sleep Mode ..................................................................................................................... 98

5.2.1 Transition to Sleep Mode.................................................................................... 98

5.2.2 Clearing Sleep Mode .......................................................................................... 98

5.2.3 Clock Frequency in Sleep (Medium-Speed) Mode ............................................ 98

Standby Mode................................................................................................................. 99

5.3.1 Transition to Standby Mode ............................................................................... 99

5.3.2 Clearing Standby Mode ...................................................................................... 99

5.3.3 Oscillator Settling Time after Standby Mode is Cleared.................................... 100

Watch Mode.................................................................................................................... 101

5.5

5.6

5.7

5.8

5.4.1 Transition to Watch Mode .................................................................................. 101

5.4.2 Clearing Watch Mode......................................................................................... 101

5.4.3 Oscillator Settling Time after Watch Mode is Cleared ...................................... 101

Subsleep Mode................................................................................................................ 102

5.5.1 Transition to Subsleep Mode .............................................................................. 102

5.5.2 Clearing Subsleep Mode..................................................................................... 102

Subactive Mode .............................................................................................................. 103

5.6.1 Transition to Subactive Mode............................................................................. 103

5.6.2 Clearing Subactive Mode ................................................................................... 103

5.6.3 Operating Frequency in Subactive Mode ........................................................... 103

Active (Medium-Speed) Mode ....................................................................................... 104

5.7.1 Transition to Active (Medium-Speed) Mode ..................................................... 104

5.7.2 Clearing Active (Medium-Speed) Mode ............................................................ 104

5.7.3 Operating Frequency in Active (Medium-Speed) Mode .................................... 104

Direct Transfer................................................................................................................ 105

Section 6

6.1

6.2

ROM

................................................................................................................. 107

6.3

6.4

Overview......................................................................................................................... 107

6.1.1 Block Diagram.................................................................................................... 107

PROM Mode................................................................................................................... 108

6.2.1 Setting to PROM Mode ..................................................................................... 108

6.2.2 Socket Adapter Pin Arrangement and Memory Map ......................................... 108

Programming .................................................................................................................. 111

6.3.1 Writing and Verifying......................................................................................... 111

6.3.2 Programming Precautions................................................................................... 116

Reliability of Programmed Data..................................................................................... 117

Section 7

7.1

RAM

................................................................................................................. 119

Overview......................................................................................................................... 119

7.1.1 Block Diagram.................................................................................................... 119

Section 8

8.1

8.2

I/O Ports

........................................................................................................... 121

8.3

Overview......................................................................................................................... 121

Port 1 ............................................................................................................................ 123

8.2.1 Overview............................................................................................................. 123

8.2.2 Register Configuration and Description ............................................................. 123

8.2.3 Pin Functions ...................................................................................................... 127

8.2.4 Pin States ............................................................................................................ 128

8.2.5 MOS Input Pull-Up............................................................................................. 128

Port 3 ............................................................................................................................ 129

8.3.1 Overview............................................................................................................. 129

8.3.2 Register Configuration and Description ............................................................. 129

8.3.3 Pin Functions ...................................................................................................... 134

HD6473927F Related Products

	HD6473927F	HD6433924F	HD6473927X	HD6433927F	HD6433927X	HD6433924X	HD6433926X	HD6433925F
Description	Microcontroller, 8-Bit, OTPROM, CMOS, PQFP80, QFP-80	Microcontroller, 8-Bit, MROM, CMOS, PQFP80, QFP-80	Microcontroller, OTPROM, CMOS, PQFP80, TFP-80F	Microcontroller, 8-Bit, MROM, CMOS, PQFP80, QFP-80	Microcontroller, 8-Bit, MROM, CMOS, PQFP80, TFP-80F	Microcontroller, 8-Bit, MROM, CMOS, PQFP80, TFP-80F	Microcontroller, 8-Bit, MROM, CMOS, PQFP80, TFP-80F	Microcontroller, 8-Bit, MROM, CMOS, PQFP80, QFP-80
Parts packaging code	QFP	QFP	QFP	QFP	QFP	QFP	QFP	QFP
package instruction	QFP,	QFP,	TQFP,	QFP,	TQFP,	TQFP,	TQFP,	QFP,
Contacts	80	80	80	80	80	80	80	80
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
Has ADC	YES	YES	YES	YES	YES	YES	YES	YES
maximum clock frequency	10 MHz	10 MHz	10 MHz	10 MHz	10 MHz	10 MHz	10 MHz	10 MHz
DAC channel	YES	YES	YES	YES	YES	YES	YES	YES
DMA channel	NO	NO	NO	NO	NO	NO	NO	NO
JESD-30 code	R-PQFP-G80	R-PQFP-G80	S-PQFP-G80	R-PQFP-G80	S-PQFP-G80	S-PQFP-G80	S-PQFP-G80	R-PQFP-G80
length	20 mm	20 mm	14 mm	20 mm	14 mm	14 mm	14 mm	20 mm
Number of I/O lines	68	68	68	68	68	68	68	68
Number of terminals	80	80	80	80	80	80	80	80
Maximum operating temperature	75 °C	75 °C	75 °C	75 °C	75 °C	75 °C	75 °C	75 °C
Minimum operating temperature	-20 °C	-20 °C	-20 °C	-20 °C	-20 °C	-20 °C	-20 °C	-20 °C
PWM channel	YES	YES	YES	YES	YES	YES	YES	YES
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	QFP	QFP	TQFP	QFP	TQFP	TQFP	TQFP	QFP
Package shape	RECTANGULAR	RECTANGULAR	SQUARE	RECTANGULAR	SQUARE	SQUARE	SQUARE	RECTANGULAR
Package form	FLATPACK	FLATPACK	FLATPACK, THIN PROFILE	FLATPACK	FLATPACK, THIN PROFILE	FLATPACK, THIN PROFILE	FLATPACK, THIN PROFILE	FLATPACK
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
ROM programmability	OTPROM	MROM	OTPROM	MROM	MROM	MROM	MROM	MROM
Maximum seat height	3.1 mm	3.1 mm	1.2 mm	3.1 mm	1.2 mm	1.2 mm	1.2 mm	3.1 mm
Maximum slew rate	30 mA	30 mA	30 mA	30 mA	30 mA	30 mA	30 mA	30 mA
Maximum supply voltage	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL EXTENDED	COMMERCIAL EXTENDED	COMMERCIAL EXTENDED	COMMERCIAL EXTENDED	COMMERCIAL EXTENDED	COMMERCIAL EXTENDED	COMMERCIAL EXTENDED	COMMERCIAL EXTENDED
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.8 mm	0.8 mm	0.65 mm	0.8 mm	0.65 mm	0.65 mm	0.65 mm	0.8 mm
Terminal location	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD
width	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER	MICROCONTROLLER	MICROCONTROLLER	MICROCONTROLLER	MICROCONTROLLER	MICROCONTROLLER	MICROCONTROLLER	MICROCONTROLLER
Maker	Hitachi （Renesas ）	Hitachi （Renesas ）	-	Hitachi （Renesas ）	Hitachi （Renesas ）	Hitachi （Renesas ）	Hitachi （Renesas ）	Hitachi （Renesas ）
bit size	8	8	-	8	8	8	8	8

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