Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at
conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratlng conditions for extended periods
may affect device reliability.
2.
The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3.
Commercial devices are guaranteed from 0°C to +85°C ambient temperature.
4.
The V
IHCMR
range is referenced to the most positive side of the differential input signal.
5.
The current provided into or from V
REF
must be limited to 800µA source and 500µA sink.
M9999-081005
hbwhelp@micrel.com or (408) 955-1690
3
Micrel, Inc.
SY88893V
AC ELECTRICAL CHARACTERISTICS
V
CC
= 3.0V to 3.6V or 4.5V to 5.5V; R
LOAD
= 50Ω to V
CC
–2V; T
A
= –40°C to +85°C; typical values at V
CC
= 3.3V, T
A
= 25°C
Symbol
HYS
t
OFF
t
ON
t
r
,t
f
V
ID
V
OD
V
SR
A
V(Diff)
B
–3dB
S
21
Parameter
SD Hysteresis
SD Release Time
SD Assert Time
Differential Output Rise/Fall Time
(20% to 80%)
Differential Input Voltage Swing
Differential Output Voltage Swing
SD Sensitivity Range
Differential Voltage Gain
3dB Bandwidth
Single-Ended Small-Signal Gain
200
26
32
V
ID
≥
18mV
PP
V
ID
= 5mV
PP
5
38
5
1500
400
50
Condition
electrical signal
Min
2
Typ
4.6
0.1
0.2
Max
8
0.5
0.5
1000
1800
Units
dB
µs
µs
ps
mV
PP
mV
PP
mV
PP
mV
PP
dB
MHz
dB
TYPICAL OPERATING CHARACTERISTICS
120
100
V
ID
(mVp-p)
80
60
SD Assert and Deassert
Levels vs. SD
LVL
V
SUP
= 3.3V
T
A
= 25°C
155Mbps
Pattern 2
23
–1
140
120
100
V
ID
(mVp-p)
80
60
40
SD Assert and Deassert
Levels vs. R
SDLVL
V
SUP
= 3.3V
T
A
= 25°C
155Mbps
Pattern 2
23
–1
ASSERT
ASSERT
40
20
DEASSERT
20
1
1.2 1.4
1
0
DEASSERT
0
10000
10
1000
SD
LVL
(referenced to V
CC
) (V)
R
SDLVL
(Ω)
M9999-081005
hbwhelp@micrel.com or (408) 955-1690
4
100000
100
0
0.2 0.4 0.6 0.8
Micrel, Inc.
SY88893V
DETAILED DESCRIPTION
The SY88893V low-power limiting post amplifier operates
from a single +3.3V or +5V power supply, over temperatures
from –40°C to +85°C. Signals with data rates up to 155Mbps
and as small as 5mV
PP
can be amplified. Figure 1 shows
the allowed input voltage swing. The SY88893V generates
an SD output. SD
LVL
sets the sensitivity of the input
amplitude detection.
Input Amplifier/Buffer
Figure 2 shows a simplified schematic of the SY88893V's
input stage. The high-sensitivity of the input amplifier allows
signals as small as 5mVp-p to be detected and amplified.
The input amplifier allows input signals as large as
1800mV
PP
. Input signals are linearly amplified with a typically
38dB differential voltage gain. Since it is a limiting amplifier,
the SY88893V outputs typically 1500mV
PP
voltage-limited
waveforms for input signals that are greater than 18mV
PP
.
Applications requiring the SY88893V to operate with high-
gain should have the upstream TIA placed as close as
possible to the SY88893V’s input pins to ensure the best
performance of the device.
Output Buffer
The SY88893V’s PECL output buffer is designed to drive
50Ω lines. The output buffer requires appropriate termination
for proper operation. An external 50Ω resistor to V
CC
–2V
for each output pin provides this. Figure 3 shows a simplified
schematic of the output stage and includes an appropriate
termination method.
Signal-Detect
The SY88893V generates a chatter-free SD open-collector
TTL output with internal 6.75kΩ pullup resistor as shown in
Figure 4. SD is used to determine that the input amplitude
is large enough to be considered a valid input. SD asserts
high if the input amplitude rises above the threshold set by
SD
LVL
and deasserts low otherwise. SD can be fed back to
the enable (EN) input to maintain output stability under a
loss of signal condition. EN deasserts the true output signal
without removing the input signals. Typically 6dB SD
hysteresis is provided to prevent chattering.
Signal-Detect Level Set
A programmable signal-detect level set pin (SD
LVL
) sets
the threshold of the input amplitude detection. Connecting
an external resistor between V
CC
and SD
LVL
sets the voltage
at SD
LVL
. This voltages ranges from V
CC
to V
REF
. The
external resistor creates a voltage divider between V
CC
and
V
REF
as shown in Figure 5. If desired, an appropriate external
voltage may be applied rather than using a resistor. The
smaller the external resistor, implying a smaller voltage
difference from SD
LVL
to V
CC
, the smaller the SD sensitivity.
Hence, larger input amplitude is required to assert SD.
“Typical Operating Characteristics” shows the relationship
between the input amplitude detection sensitivity and the
SD
LVL
voltage.
Hysteresis
The SY88893V provides typically 6dB SD electrical
hysteresis. By definition, a power ratio measured in dB is
10log(power ratio). Power is calculated as V
2IN
/R for an
electrical signal. Hence, the same ratio can be stated as
20log(voltage ratio). While in linear mode, the electrical
voltage input changes linearly with the optical power and
hence the ratios change linearly. Therefore, the optical
hysteresis in dB is half the electrical hysteresis in dB given
in the datasheet. The SY88893V provides typically 3dB SD
optical hysteresis. As the SY88893V is an electrical device,
this datasheet refers to hysteresis in electrical terms. With
6dB SD hysteresis, a voltage factor of two is required to
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