High Speed Synchronous Power
MOS.ET Driver
POWER MANAGEMENT
Description
The SC1205H is a cost effective,
High Drive Voltage,
Dual MOS.ET Driver designed for switching High and Low
side Power MOS.ETs. Each driver is capable of Ultra-
fast rise/fall times as well as a 20ns max propagation
delay from input transition to the gate of the power .ETs.
An internal Overlap Protection circuit prevents shoot-
through from Vin to GND in the main and synchronous
MOS.ETs. The Adaptive Overlap Protection circuit en-
sures the Bottom .ET does not turn on until the Top .ET
source has reached a voltage low enough to prevent
cross-conduction.
Higher gate voltage drive capability of 8V (top and
bottom) optimally reduces Rds_on of power MOS.ETs
without excessive driver and .ET switching losses. The
high current drive capability (5A peak) allows fast switch-
ing, thus reducing switching losses at high (up to 1MHz)
frequencies without causing thermal stress on the driver.
The high voltage CMOS process allows operation from 5-
18 Volts at top MOS.ET drain, thus making SC1205H
suitable for battery powered applications. Connecting
Enable pin (EN) to logic low shuts down both drives and
reduces operating current to less than 10µA.
An under-voltage-lock-out and overtemperature shut-
down feature is included to guarantee proper and safe
operation. The SC1205H is offered in a standard SO-8
package.
SC1205H
PRELIMINARY
.eatures
K
Higher efficiency (>90%)
K
.ast rise and fall times (15ns typical with 3000pf
load)
K
Higher
gate drive voltage (8V) for optimum
MOS.ET RDS_ON at minimum switching loss
K
Ultra-low (<20ns) propagation delay (BG going low)
K
5 Amp peak drive current
K
Adaptive non-overlapping gate drives provide
shoot-through protection
K
.loating top drive switches up to 18V
K
Under-voltage lock-out
K
Over-temperature shutdown
K
Less than 10
µ
A supply current when EN is low
K
Low cost
Applications
K
K
K
K
K
Intel Pentium
TM
power supplies
AMD Athlon
TM
and K8
TM
power supplies
High efficiency portable and notebook computers
Battery powered applications
High frequency (to 1.0 MHz) operation allows use
of small inductors and low cost caps in place of
electrolytics
Typical Application Circuit
Vin 5-12V
2200uf
10u,CER
10nf
10
2.5m
+8V
70N03
1
2
3
4
5
6
7
Rf
8
VID4
VID3
VID2
VID1
VID0
ERROUT
FB
RREF
VCC
BGOUT
OC+
OUT1
OUT2
OC-
UVLO
GND
16
15
14
13
12
11
BST
TG
+8V
VS
EN
DRN
70N03
BG
CO
SC1205H
GND
1.5V,40A
70N03
10
9
BST
TG
VS
EN
DRN
70N03
Rref
+8V
SC2422B
CO
Ri
SC1205H
BG
GND
Revision 2, June 2002
1
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SC1205H
POWER MANAGEMENT
Absolute Maximum Ratings
Parameter
V
CC
Supply Voltage
BST to PGND
BST to DRN
DRN to PGND
DRN to PGND Pulse
Symbol
V
IMAXSW
VMAX
BST-PGND
VMAX
BST-DRN
VMAX
DRN-PGN
VMAX
PULSE
t
PULSE
< 100ns
t
PULSE
< 20ns
EN to PGND
Input Pin
Continuous Power Dissipation
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering) 10 Sec.
VMAX
OVP S-PGND
CO
P
D
θ
J C
θ
J A
T
J
T
STG
T
LEAD
Tamb = 25°C, T
J
= 125°C
Tcase = 25°C, T
J
=125°C
Conditions
Maximum
11
30
11
-2 to 25
-5 to 25
-10 to 25
12
-0.3 to 12
0.66
2.56
40
150
0 to +125
-65 to +150
300
V
V
W
°C/W
°C/W
°C
°C
°C
PRELIMINARY
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified
in the Electrical Characteristics section is not implied.
Units
V
V
V
V
V
Note:
(1) Specification refers to application circuit in Figure 1.
Electrical Characteristics
Unless specified: -0 <
θ
J
< 125°C; V
CC
= 5V; 4V < V
BST
< 26V
Parameter
Pow er Supply
Supply Voltage
Quiescent Current, Operating
Quiescent Current
Under Voltage Lockout
Start Threshold
Hysteresis
Symbol
Conditions
Min
Typ
Max
Units
V
CC
Iq_op
Iq_stby
V
CC
V
CC
= 5V, C
O
= OV
EN = OV
4.2
5
1
9.0
V
mA
10
µA
V
START
Vhys
UVLO
4.2
4.4
0.05
4.75
V
V
2002 Semtech Corp.
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SC1205H
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Unless specified: -0 <
θ
J
< 125°C; V
CC
= 5V; 4V < V
BST
< 26V
PRELIMINARY
Parameter
CO
High Level Input Voltage
High Level Input Voltage
Low Level Input Voltage
EN
High Level Input Voltage
High Level Input Voltage
Low Level Input Voltage
Thermal Shutdow n
Over Temperature Trip Point
Hysteresis
High Side Driver
Peak Output Current
Output Resistance
Symbol
Conditions
Min
Typ
Max
Units
V
IH
V
IH
V
IL
V
C C
= 9V
2.0
2.65
0.8
V
V
V
V
IH
V
IH
V
IL
V
C C
= 9V
2.0
2.2
0.8
V
V
V
T
OTP
T
HYST
165
10
°C
°C
I
PKH
Rsrc
TG
Rsink
TG
duty cycle < 2%, tpw < 100 µs,
T
J
= 125°C, V
BST
- V
DRN
= 4.5V,
V
TG
= 4.0V (src) +V
DRN
or V
TG
= 0.05V (sink) +V
DRN
3
1
A
Ω
.7
Low -Side Driver
Peak Output Current
Output Resistance
I
PKL
Rsrc
BG
Rsink
BG
duty cycle < 2%, tpw < 100 µs,
T
A
= 25°C,
V
V S
= 4.6V, V
BG
= 4V (src),
or V
LOWDR
= 0.5V (sink)
3
1.2
A
Ω
Ω
1.0
AC Operating Specifications
Parameter
High Side Driver
Rise Time
Fall Time
Propagation Delay Time,
TG Going High
Propagation Delay Time,
TG Going Low
2002 Semtech Corp.
Symbol
Conditions
Min
Typ
Max
Units
tr
TG1
tf
TG
tpdh
TG
tpdl
TG
CI = 3nF, V
BST
- V
DRN
= 8V
CI = 3nF, V
BST
- V
DRN
= 8V
CI = 3nF, V
BST
- V
DRN
= 8V
CI = 3nF, V
BST
- V
DRN
= 8V
3
14
12
20
15
ns
ns
ns
ns
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SC1205H
POWER MANAGEMENT
Pin Configuration
Top View
PRELIMINARY
Ordering Information
Device
(1)
P ackag e
SO-8
Temp Range (T
J
)
0° to 125°C
SC1205HSTR
Note:
(1) Only available in tape and reel packaging. A reel
contains 2500 devices.
(SO-8)
Pin Descriptions
Pin #
1
2
3
4
5
6
7
8
Pin Name
DRN
TG
BST
CO
EN
VS
BG
PGND
Pin Function
This pin connects to the junction of the switching and synchronous MOSFETs . This pin
can be subjected to a -2V minimum relative to PGND without effecting operation.
Output gate drive for the switching (high-side) MOSFET.
Bootstrap pin. A capacitor is connected between BST and DRN pins to develop the
floating bootstrap voltage for the high-side MOSFET. The capacitor value is typically
between 0.1µF and 1µF (ceramic).
TTL-level input signal to the MOSFET drivers.
When high, this pin enables the internal circuitry of the device. When low, TG and BG
are forced low and the supply current (5V) is less than 10µA.
5V-9.0V supply. A .22-1µF ceramic capacitor should be connected from 5V to PGND
very close to this pin.
Output drive for the synchronous (bottom) MOSFET.
Ground. Keep this pin close to the synchronous MOSFETs source.
Note:
(1) All logic level inputs and outputs are open collector TTL compatible.
2002 Semtech Corp.
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