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SN74ALVC16543DGGR

Description
ALVC/VCX/A SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
Categorylogic   
File Size135KB,6 Pages
ManufacturerTexas Instruments
Websitehttp://www.ti.com.cn/
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SN74ALVC16543DGGR Overview

ALVC/VCX/A SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56

SN74ALVC16543DGGR Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerTexas Instruments
package instructionTSSOP, TSSOP56,.3,20
Reach Compliance Codenot_compliant
Other featuresINDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; MASTER CONTROL FOR LATCH
Control typeINDEPENDENT CONTROL
Counting directionBIDIRECTIONAL
seriesALVC/VCX/A
JESD-30 codeR-PDSO-G56
length14 mm
Logic integrated circuit typeREGISTERED BUS TRANSCEIVER
MaximumI(ol)0.024 A
Number of digits8
Number of functions2
Number of ports2
Number of terminals56
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP56,.3,20
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3.3 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
translateN/A
width6.1 mm
Base Number Matches1

SN74ALVC16543DGGR Related Products

SN74ALVC16543DGGR SN74ALVC16543DLR
Description ALVC/VCX/A SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 ALVC/VCX/A SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
Maker Texas Instruments Texas Instruments
Reach Compliance Code not_compliant unknown
Other features INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; MASTER CONTROL FOR LATCH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; MASTER CONTROL FOR LATCH
series ALVC/VCX/A ALVC/VCX/A
JESD-30 code R-PDSO-G56 R-PDSO-G56
length 14 mm 18.415 mm
Logic integrated circuit type REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER
Number of digits 8 8
Number of functions 2 2
Number of ports 2 2
Number of terminals 56 56
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Output characteristics 3-STATE 3-STATE
Output polarity TRUE TRUE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP SSOP
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH
Certification status Not Qualified Not Qualified
Maximum seat height 1.2 mm 2.79 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V
Minimum supply voltage (Vsup) 2.7 V 2.7 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL
Terminal form GULL WING GULL WING
Terminal pitch 0.5 mm 0.635 mm
Terminal location DUAL DUAL
width 6.1 mm 7.5 mm
Base Number Matches 1 1

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