EEWORLDEEWORLDEEWORLD

Part Number

Search

531RA1024M00DGR

Description
LVPECL Output Clock Oscillator, 1024MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
Categoryoscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

531RA1024M00DGR Overview

LVPECL Output Clock Oscillator, 1024MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531RA1024M00DGR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
package instructionROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Codeunknown
Other featuresTAPE AND REEL
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability50%
JESD-609 codee4
Manufacturer's serial number531
Installation featuresSURFACE MOUNT
Nominal operating frequency1024 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVPECL
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage2.75 V
Minimum supply voltage2.25 V
Nominal supply voltage2.5 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
Base Number Matches1
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
If the front wheel is repaired, will the rear wheel still be far behind?
Once, the inner belt of the front wheel of the bike broke, so I replaced it. Later, the bike was retired. I bought a second-hand one. The outer belt of this bike was older. Yesterday evening, when I w...
ienglgge Talking
Technology Classroom | Cortex-M Architecture MCU Relocation Vector Table
The Cortex-M architecture uses a "vector table lookup mechanism". When an exception occurs, the kernel will automatically find the entry address of the handler from the vector table. The vector table ...
MamoYU Real-time operating system RTOS
After compiling C and C++, and tracing with Trace32, how can I display the corresponding C and C++ code in trace32?
After compiling C and C++, I use Trace32 to trace. How can I display the corresponding C and C++ codes in trace32? Now it can only display C code. How can I debug and display C++ code? Thank you!!!!...
ccec Embedded System
Tell XST not to add I/O buffers?
The top module has only one input clock , but I want to use it as the input of the DCM and use it to count the delay to control the reset of the DCM. If I use it directly, an error will be reported du...
andyandy FPGA/CPLD
The main types of Hysent chip diodes are as follows
[size=3][b]SMD Schottky diodes (SMA, SMB, SMC packages): [/b][/size] [size=3] SS12~10 SK22~10 SK12~10 SK32~10[/size] [size=3][b]SMD transient diodes (SMA, SMB, SMC packages): [/b] [/size] [size=3] SMA...
naren PCB Design
STM32 learning fourth post, pointer chapter, welcome experts to spray and guide
[i=s] This post was last edited by long521 on 2017-6-4 08:45 [/i] The topic I posted today is actually not very related to STM32, but it is a knowledge point of C language. Because my foundation of C ...
long521 stm32/stm8

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 301  1913  1226  1943  1646  7  39  25  40  34 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号