Output frequency is tunable with external capacitors
RMS phase jitter: 1.33ps (typical)
2.5V operating supply
-40°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
General Description
The ICS844441I is a low jitter, high performance
clock generator and a member of the FemtoClocks™
HiPerClockS™
family of silicon timing products. The ICS844441I is
designed for use in applications using the SAS and
SATA interconnect. The ICS844441I uses an
external, 25MHz, parallel resonant crystal to generate four
selectable output frequencies: 75MHz, 100MHz, 150MHz, and
300MHz. This silicon based approach provides excellent
frequency stability and reliability. The ICS844441I features down
and center spread spectrum (SSC) clocking techniques.
ICS
Applications
•
•
•
•
•
•
•
SAS/SATA Host Bus Adapters
SATA Port Multipliers
SAS I/O Controllers
TapeDrive and HDD Array Controllers
SAS Edge and Fanout Expanders
HDDs and TapeDrives
Disk Storage Enterprise
Pin Assignment
XTAL_OUT
XTAL_IN
1
2
3
4
8
7
6
5
GND
nQ
Q
V
DD
Block Diagrams
XTAL_IN
SSC_SEL0
SSC_SEL1
25MHz
XTAL
XTAL_OUT
OSC
FemtoClock™
PLL
00 = SSC Off
01 = 0.5% Down-spread
10 = 0.23% Down-spread
11 = 0.5% Center-spread
Q
nQ
ICS844441I
8-Lead SOIC, 150 mil
3.90mm x 4.90mm x 1.375mm package body
M Package
Top View
GND
XTAL_OUT
XTAL_IN
SSC_SEL0
nc
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
F_SEL1
GND
nPLL_SEL
nQ
Q
V
DD
F_SEL0
V
DD
SSC_SEL(1:0)
Pulldown:Pulldown
SSC Output
Control Logic
8-Lead SOIC
nPLL_SEL
Pulldown
XTAL_IN
25MHz
XTAL
XTAL_OUT
OSC
FemtoClock™
PLL
0
1
00 = 75MHz
01 = 100MHz
10 = 150MHz
(default)
11 = 300MHz
Q
nQ
nc
nc
SSC_SEL1
F_SEL(1:0)
SSC_SEL(1:0)
Pullup:Pulldown
Pulldown:Pulldown
Clock Output
Control Logic
16-Lead TSSOP
ICS844441I
16-Lead TSSOP
4.4mm x 5.0mm x 0.925mm package body
G Package
Top View
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization
and/or qualification. Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.
IDT™ / ICS™
SAS/SATA CLOCK GENERATOR
1
ICS844441AGI REV. A JULY 17, 2008
ICS844441I
FEMTOCLOCK
TM
SAS/SATA CLOCK GENERATOR
PRELIMINARY
Table 1. Pin Descriptions
Name
XTAL_OUT,
XTAL_IN
SSC_SEL0,
SSC_SEL1
F_SEL0
F_SEL1
nPLL_SEL
Q, nQ
GND
V
DD
nc
Input
Input
Input
Input
Input
Output
Power
Power
Unused
Pulldown
Pulldown
Pullup
Pulldown
Type
Description
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.
SSC select pins. See Table 3A. LVCMOS/LVTTL interface levels.
Output frequency select pin. See Table 3B. LVCMOS/LVTTL interface levels.
Output frequency select pin. See Table 3B. LVCMOS/LVTTL interface levels.