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74LVC1G10GV

Description
Single 3-input NAND gate
Categorylogic    logic   
File Size63KB,14 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
Download Datasheet Parametric Compare View All

74LVC1G10GV Overview

Single 3-input NAND gate

74LVC1G10GV Parametric

Parameter NameAttribute value
Source Url Status Check Date2013-06-14 00:00:00
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerNXP
Parts packaging codeTSOP
package instructionPLASTIC, SC-74, SOT-457, TSOP-6
Contacts6
Reach Compliance Codecompli
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-G6
JESD-609 codee3
length2.9 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeNAND GATE
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of functions1
Number of entries3
Number of terminals6
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSOP6,.11,37
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Prop。Delay @ Nom-Su6.2 ns
propagation delay (tpd)21.5 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)1.65 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTin (Sn)
Terminal formGULL WING
Terminal pitch0.95 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width1.5 mm
Base Number Matches1
74LVC1G10
Single 3-input NAND gate
Rev. 01 — 2 October 2007
Product data sheet
1. General description
The 74LVC1G10 provides a low-power, low-voltage single 3-input NAND gate.
The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of
this device in a mixed 3.3 V and 5 V environment.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
time.
This device is fully specified for partial power-down applications using I
OFF
.
The I
OFF
circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2. Features
s
Wide supply voltage range from 1.65 V to 5.5 V
s
High noise immunity
s
Complies with JEDEC standard:
x
JESD8-7 (1.65 V to 1.95 V)
x
JESD8-5 (2.3 V to 2.7 V)
x
JESD8-B/JESD36 (2.7 V to 3.6 V).
s
±24
mA output drive (V
CC
= 3.0 V)
s
CMOS low power consumption
s
Latch-up performance exceeds 250 mA
s
Direct interface with TTL levels
s
Inputs accept voltages up to 5 V
s
ESD protection:
x
HBM JESD22-A114E exceeds 2000 V
x
MM JESD22-A115-A exceeds 200 V
x
CDM JESD22-C101-C exceeds 1000 V
s
Multiple package options
s
Specified from
−40 °C
to +85
°C
and
−40 °C
to +125
°C

74LVC1G10GV Related Products

74LVC1G10GV 74LVC1G10 74LVC1G10GM 74LVC1G10GW 74LVC1G10GF
Description Single 3-input NAND gate Single 3-input NAND gate Single 3-input NAND gate Single 3-input NAND gate Single 3-input NAND gate
Source Url Status Check Date 2013-06-14 00:00:00 - 2013-06-14 00:00:00 2013-06-14 00:00:00 2013-06-14 00:00:00
Is it lead-free? Lead free - Lead free Lead free Lead free
Is it Rohs certified? conform to - conform to conform to conform to
Maker NXP - NXP NXP NXP
Parts packaging code TSOP - SON SOT-363 SON
package instruction PLASTIC, SC-74, SOT-457, TSOP-6 - VSON, SOLCC6,.04,20 PLASTIC, SC-88, SOT-363, 6 PIN VSON, SOLCC6,.04,14
Contacts 6 - 6 6 6
Reach Compliance Code compli - compli compli compli
series LVC/LCX/Z - LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z
JESD-30 code R-PDSO-G6 - R-PDSO-N6 R-PDSO-G6 S-PDSO-N6
JESD-609 code e3 - e3 e3 e3
length 2.9 mm - 1.45 mm 2 mm 1 mm
Load capacitance (CL) 50 pF - 50 pF 50 pF 50 pF
Logic integrated circuit type NAND GATE - NAND GATE NAND GATE NAND GATE
MaximumI(ol) 0.024 A - 0.024 A 0.024 A 0.024 A
Humidity sensitivity level 1 - 1 1 1
Number of functions 1 - 1 1 1
Number of entries 3 - 3 3 3
Number of terminals 6 - 6 6 6
Maximum operating temperature 125 °C - 125 °C 125 °C 125 °C
Minimum operating temperature -40 °C - -40 °C -40 °C -40 °C
Package body material PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP - VSON TSSOP VSON
Encapsulate equivalent code TSOP6,.11,37 - SOLCC6,.04,20 TSSOP6,.08 SOLCC6,.04,14
Package shape RECTANGULAR - RECTANGULAR RECTANGULAR SQUARE
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH - SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, VERY THIN PROFILE
method of packing TAPE AND REEL - TAPE AND REEL TAPE AND REEL TAPE AND REEL
Peak Reflow Temperature (Celsius) 260 - 260 260 260
power supply 3.3 V - 3.3 V 3.3 V 3.3 V
Prop。Delay @ Nom-Su 6.2 ns - 6.2 ns 6.2 ns 6.2 ns
propagation delay (tpd) 21.5 ns - 21.5 ns 21.5 ns 21.5 ns
Certification status Not Qualified - Not Qualified Not Qualified Not Qualified
Schmitt trigger NO - NO NO NO
Maximum seat height 1.1 mm - 0.5 mm 1.1 mm 0.5 mm
Maximum supply voltage (Vsup) 5.5 V - 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 1.65 V - 1.65 V 1.65 V 1.65 V
Nominal supply voltage (Vsup) 1.8 V - 1.8 V 1.8 V 1.8 V
surface mount YES - YES YES YES
technology CMOS - CMOS CMOS CMOS
Temperature level AUTOMOTIVE - AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
Terminal surface Tin (Sn) - Tin (Sn) Tin (Sn) Tin (Sn)
Terminal form GULL WING - NO LEAD GULL WING NO LEAD
Terminal pitch 0.95 mm - 0.5 mm 0.65 mm 0.35 mm
Terminal location DUAL - DUAL DUAL DUAL
Maximum time at peak reflow temperature 30 - 30 30 30
width 1.5 mm - 1 mm 1.25 mm 1 mm
Base Number Matches 1 - 1 1 1
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