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8533AG-01T

Description
Low Skew Clock Driver, 8533 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.92 MM HEIGHT, MS-153, TSSOP-20
Categorylogic    logic   
File Size271KB,17 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric Compare View All

8533AG-01T Overview

Low Skew Clock Driver, 8533 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.92 MM HEIGHT, MS-153, TSSOP-20

8533AG-01T Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP20,.25
Contacts20
Reach Compliance Codenot_compliant
ECCN codeEAR99
Is SamacsysN
series8533
Input adjustmentDIFFERENTIAL MUX
JESD-30 codeR-PDSO-G20
JESD-609 codee0
length6.5 mm
Logic integrated circuit typeLOW SKEW CLOCK DRIVER
Humidity sensitivity level1
Number of functions1
Number of inverted outputs
Number of terminals20
Actual output times4
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP20,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)225
power supply3.3 V
Prop。Delay @ Nom-Sup1.4 ns
propagation delay (tpd)1.4 ns
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.03 ns
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.465 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature20
width4.4 mm
Base Number Matches1
ICS8533-01
L
OW
S
KEW
, 1-
TO
-4
D
IFFERENTIAL
-
TO
-3.3V LVPECL F
ANOUT
B
UFFER
G
ENERAL
D
ESCRIPTION
The ICS8533-01 is a low skew, high performance 1-to-4
Differential-to-3.3V LVPECL Fanout Buffer. The ICS8533-
01 has two selectable clock inputs. The CLK, nCLK pair
can accept most standard differential input levels. The
PCLK, nPCLK pair can accept LVPECL, CML, or SSTL
input levels. The clock enable is internally synchronized to
eliminate runt pulses on the outputs during asynchronous
assertion/deassertion of the clock enable pin. Guaranteed
output and part-to-part skew characteristics make the
ICS8533-01 ideal for those applications demanding well
defined performance and repeatability.
F
EATURES
Four differential 3.3V LVPECL outputs
Selectable differential CLK, nCLK or LVPECL clock inputs
CLK, nCLK pair can accept the following differential
input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
PCLK, nPCLK supports the following input types:
LVPECL, CML, SSTL
Maximum output frequency: 650MHz
Translates any single-ended input signal to 3.3V
LVPECL levels with resistor bias on nCLK input
Output skew: 30ps (maximum)
Part-to-part skew: 150ps (maximum)
Propagation delay: 1.4ns (maximum)
Additive phase jitter, RMS: 0.06ps (typical)
3.3V operating supply
0°C to 70°C ambient operating temperature
Lead-Free packages available
Industrial temperature information available upon request
B
LOCK
D
IAGRAM
CLK_EN
D
Q
LE
CLK
nCLK
PCLK
nPCLK
0
1
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
P
IN
A
SSIGNMENT
V
EE
CLK_EN
CLK_SEL
CLK
nCLK
PCLK
nPCLK
nc
nc
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Q0
nQ0
V
CC
Q1
nQ1
Q2
nQ2
V
CC
Q3
nQ3
CLK_SEL
ICS8533-01
20-Lead TSSOP
6.5mm x 4.4mm x 0.92mm package body
G Package
Top View
8533AG-01
www.idt.com
1
REV. F AUGUST 4, 2010

8533AG-01T Related Products

8533AG-01T 8533AG-01
Description Low Skew Clock Driver, 8533 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.92 MM HEIGHT, MS-153, TSSOP-20 Low Skew Clock Driver, 8533 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.92 MM HEIGHT, MS-153, TSSOP-20
Is it lead-free? Contains lead Contains lead
Is it Rohs certified? incompatible incompatible
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code TSSOP TSSOP
package instruction TSSOP, TSSOP20,.25 TSSOP, TSSOP20,.25
Contacts 20 20
Reach Compliance Code not_compliant not_compliant
ECCN code EAR99 EAR99
Is Samacsys N N
series 8533 8533
Input adjustment DIFFERENTIAL MUX DIFFERENTIAL MUX
JESD-30 code R-PDSO-G20 R-PDSO-G20
JESD-609 code e0 e0
length 6.5 mm 6.5 mm
Logic integrated circuit type LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER
Humidity sensitivity level 1 1
Number of functions 1 1
Number of terminals 20 20
Actual output times 4 4
Maximum operating temperature 70 °C 70 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSSOP
Encapsulate equivalent code TSSOP20,.25 TSSOP20,.25
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) 225 225
power supply 3.3 V 3.3 V
Prop。Delay @ Nom-Sup 1.4 ns 1.4 ns
propagation delay (tpd) 1.4 ns 1.4 ns
Certification status Not Qualified Not Qualified
Same Edge Skew-Max(tskwd) 0.03 ns 0.03 ns
Maximum seat height 1.2 mm 1.2 mm
Maximum supply voltage (Vsup) 3.465 V 3.465 V
Minimum supply voltage (Vsup) 3.135 V 3.135 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
Temperature level COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15)
Terminal form GULL WING GULL WING
Terminal pitch 0.65 mm 0.65 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature 20 30
width 4.4 mm 4.4 mm
Base Number Matches 1 1
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