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TC74AC280P_07

Description
CMOS Digital Integrated Circuit Silicon Monolithic 9-Bit Parity Generator/Checker
File Size357KB,9 Pages
ManufacturerToshiba Semiconductor
Websitehttp://toshiba-semicon-storage.com/
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TC74AC280P_07 Overview

CMOS Digital Integrated Circuit Silicon Monolithic 9-Bit Parity Generator/Checker

TC74AC280P/F/FN
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74AC280P,TC74AC280F,TC74AC280FN
9-Bit Parity Generator/Checker
The TC74AC280 is an advanced high speed CMOS 9-BIT
PARITY GENERATOR fabricated with silicon gate and
double-layer metal wiring C
2
MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
The TC74AC280 is composed of nine data inputs (A thru I) and
odd/even parity outputs(Σ ODD and
Σ
EVEN).
The odd parity output is high when an odd number of data
inputs are high. The even parity output is high when an even
number of data inputs are high.
The word-length capability is easily expanded by cascading.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74AC280P
TC74AC280F
Features
High speed: t
pd
= 7.8 ns (typ.) at V
CC
= 5 V
Low power dissipation: I
CC
= 8
μA
(max) at Ta = 25°C
High noise immunity: V
NIH
= V
NIL
= 28% V
CC
(min)
Symmetrical output impedance: |I
OH
| = I
OL
= 24 mA (min)
Capability of driving 50
Ω
TC74AC280FN
transmission lines.
Balanced propagation delays: t
pLH
t
pHL
Wide operating voltage range: V
CC
(opr) = 2~5.5 V
Pin and function compatible with 74F280
Pin Assignment
Weight
DIP14-P-300-2.54
SOP14-P-300-1.27A
SOL14-P-150-1.27
: 0.96 g (typ.)
: 0.18 g (typ.)
: 0.12 g (typ.)
NC: No connection
1
2007-10-01

TC74AC280P_07 Related Products

TC74AC280P_07 TC74AC280P TC74AC280F TC74AC280FN
Description CMOS Digital Integrated Circuit Silicon Monolithic 9-Bit Parity Generator/Checker CMOS Digital Integrated Circuit Silicon Monolithic 9-Bit Parity Generator/Checker CMOS Digital Integrated Circuit Silicon Monolithic 9-Bit Parity Generator/Checker CMOS Digital Integrated Circuit Silicon Monolithic 9-Bit Parity Generator/Checker
Is it Rohs certified? - conform to incompatible conform to
Maker - Toshiba Semiconductor Toshiba Semiconductor Toshiba Semiconductor
Parts packaging code - DIP SOIC SOIC
package instruction - DIP, DIP14,.3 0.300 INCH, 1.27 MM PITCH, PLASTIC, SOP-14 SOP, SOP14,.25
Contacts - 14 14 14
Reach Compliance Code - unknow unknow unknow
series - AC AC AC
JESD-30 code - R-PDIP-T14 R-PDSO-G14 R-PDSO-G14
length - 19.25 mm 10.3 mm 8.65 mm
Load capacitance (CL) - 50 pF 50 pF 50 pF
Logic integrated circuit type - PARITY GENERATOR/CHECKER PARITY GENERATOR/CHECKER PARITY GENERATOR/CHECKER
Number of digits - 9 9 9
Number of functions - 1 1 1
Number of terminals - 14 14 14
Maximum operating temperature - 85 °C 85 °C 85 °C
Minimum operating temperature - -40 °C -40 °C -40 °C
Output polarity - COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY
Package body material - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code - DIP SOP SOP
Encapsulate equivalent code - DIP14,.3 SOP14,.3 SOP14,.25
Package shape - RECTANGULAR RECTANGULAR RECTANGULAR
Package form - IN-LINE SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
power supply - 3.3/5 V 3.3/5 V 3.3/5 V
propagation delay (tpd) - 25 ns 25 ns 25 ns
Certification status - Not Qualified Not Qualified Not Qualified
Maximum seat height - 4.45 mm 1.9 mm 1.75 mm
Maximum supply voltage (Vsup) - 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) - 2 V 2 V 2 V
surface mount - NO YES YES
technology - CMOS CMOS CMOS
Temperature level - INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal form - THROUGH-HOLE GULL WING GULL WING
Terminal pitch - 2.54 mm 1.27 mm 1.27 mm
Terminal location - DUAL DUAL DUAL
Maximum time at peak reflow temperature - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width - 7.62 mm 5.3 mm 3.9 mm
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