TC74HC04AP datasheet, PDF - EEWORLD Datasheet

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TC74HC04AP: DescriptionHC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO14; Categorylogic logic; File Size250KB，8 Pages; ManufacturerToshiba Semiconductor; Websitehttp://toshiba-semicon-storage.com/; Environmental Compliance

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TC74HC04AP Overview

HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO14

TC74HC04AP Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Toshiba Semiconductor
Parts packaging code	DIP
package instruction	DIP, DIP14,.3
Contacts	14
Reach Compliance Code	unknow
series	HC/UH
JESD-30 code	R-PDIP-T14
length	19.25 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	INVERTER
MaximumI(ol)	0.004 A
Number of functions	6
Number of entries	1
Number of terminals	14
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2/6 V
Prop。Delay @ Nom-Su	19 ns
propagation delay (tpd)	95 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	4.45 mm
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	4.5 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

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TC74HC04AP/AF/AFN

TOSHIBA CMOS Digital Integrated Circuit

Silicon Monolithic

TC74HC04AP,TC74HC04AF,TC74HC04AFN

Hex Inverter

The TC74HC04A is a high speed CMOS INVERTER fabricated

with silicon gate C

MOS technology.

It achieves the high speed operation similar to equivalent

LSTTL while maintaining the CMOS low power dissipation.

The internal circuit is composed of 3 stages, including buffered

output, which provide high noise immunity and stable output.

All inputs are equipped with protection circuits against satic

discharge or transient excess voltage.

Note: xxxFN (JEDEC SOP) is not available in

Japan.

TC74HC04AP

Features

•

High speed: t

= 6 ns (typ.) at V

= 5 V

Low power dissipation: I

= 1

μA

(max) at Ta = 25°C

High noise immunity: V

NIH

= V

NIL

= 28% V

(min)

Output drive capability: 10 LSTTL loads

Symmetrical output impedance: |I

| = I

= 4 mA (min)

Balanced propagation delays: t

pLH

∼

pHL

−

Wide operating voltage range: V

(opr) = 2 to 6 V

Pin and function compatible with 74LS04

TC74HC04AF

•

TC74HC04AFN

Pin Assignment

Weight

DIP14-P-300-2.54

SOP14-P-300-1.27A

SOL14-P-150-1.27

: 0.96 g (typ.)

: 0.18 g (typ.)

: 0.12 g (typ.)

IEC Logic Symbol

2007-10-01

TC74HC04AP Related Products

	TC74HC04AP	TC74HC04AF	TC74HC04AP_07	TC74HC04AFN
Description	HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO14	HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO14	HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO14	HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO14
series	HC/UH	HC/UH	HC/UH	HC/UH
Number of functions	6	6	6	6
Number of terminals	14	14	14	14
Maximum operating temperature	85 °C	85 °C	85 Cel	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 Cel	-40 °C
surface mount	NO	YES	Yes	YES
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	THROUGH-HOLE	GULL WING	GULL WING	GULL WING
Terminal location	DUAL	DUAL	DUAL	DUAL
Is it Rohs certified?	conform to	incompatible	-	conform to
Maker	Toshiba Semiconductor	Toshiba Semiconductor	-	Toshiba Semiconductor
Parts packaging code	DIP	SOIC	-	SOIC
package instruction	DIP, DIP14,.3	SOP, SOP14,.3	-	SOP, SOP14,.25
Contacts	14	14	-	14
Reach Compliance Code	unknow	unknow	-	unknow
JESD-30 code	R-PDIP-T14	R-PDSO-G14	-	R-PDSO-G14
length	19.25 mm	10.3 mm	-	8.65 mm
Load capacitance (CL)	50 pF	50 pF	-	50 pF
Logic integrated circuit type	INVERTER	INVERTER	-	INVERTER
MaximumI(ol)	0.004 A	0.004 A	-	0.004 A
Number of entries	1	1	-	1
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY
encapsulated code	DIP	SOP	-	SOP
Encapsulate equivalent code	DIP14,.3	SOP14,.3	-	SOP14,.25
Package shape	RECTANGULAR	RECTANGULAR	-	RECTANGULAR
Package form	IN-LINE	SMALL OUTLINE	-	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	-	NOT SPECIFIED
power supply	2/6 V	2/6 V	-	2/6 V
Prop。Delay @ Nom-Su	19 ns	19 ns	-	19 ns
propagation delay (tpd)	95 ns	95 ns	-	95 ns
Certification status	Not Qualified	Not Qualified	-	Not Qualified
Schmitt trigger	NO	NO	-	NO
Maximum seat height	4.45 mm	1.9 mm	-	1.75 mm
Maximum supply voltage (Vsup)	6 V	6 V	-	6 V
Minimum supply voltage (Vsup)	2 V	2 V	-	2 V
Nominal supply voltage (Vsup)	4.5 V	4.5 V	-	4.5 V
technology	CMOS	CMOS	-	CMOS
Terminal pitch	2.54 mm	1.27 mm	-	1.27 mm
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	-	NOT SPECIFIED
width	7.62 mm	5.3 mm	-	3.9 mm

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