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TC74HC04AP_07

Description
HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO14
Categorysemiconductor    logic   
File Size250KB,8 Pages
ManufacturerToshiba Semiconductor
Websitehttp://toshiba-semicon-storage.com/
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TC74HC04AP_07 Overview

HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO14

TC74HC04AP_07 Parametric

Parameter NameAttribute value
Number of functions6
Number of terminals14
Maximum operating temperature85 Cel
Minimum operating temperature-40 Cel
Maximum supply/operating voltage6 V
Minimum supply/operating voltage2 V
Rated supply voltage5 V
Processing package description0.150 INCH, 1.27 MM PITCH, PLASTIC, SOL-14
stateTRANSFERRED
CraftsmanshipCMOS
packaging shapeRECTANGULAR
Package SizeSMALL OUTLINE
surface mountYes
Terminal formGULL WING
Terminal spacing1.27 mm
terminal coatingTIN LEAD
Terminal locationDUAL
Packaging MaterialsPLASTIC/EPOXY
Temperature levelINDUSTRIAL
seriesHC/UH
Logic IC typeINVERT
Number of inputs1
propagation delay TPD95 ns
TC74HC04AP/AF/AFN
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74HC04AP,TC74HC04AF,TC74HC04AFN
Hex Inverter
The TC74HC04A is a high speed CMOS INVERTER fabricated
with silicon gate C
2
MOS technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
The internal circuit is composed of 3 stages, including buffered
output, which provide high noise immunity and stable output.
All inputs are equipped with protection circuits against satic
discharge or transient excess voltage.
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74HC04AP
Features
High speed: t
pd
= 6 ns (typ.) at V
CC
= 5 V
Low power dissipation: I
CC
= 1
μA
(max) at Ta = 25°C
High noise immunity: V
NIH
= V
NIL
= 28% V
CC
(min)
Output drive capability: 10 LSTTL loads
Symmetrical output impedance: |I
OH
| = I
OL
= 4 mA (min)
Balanced propagation delays: t
pLH
t
pHL
Wide operating voltage range: V
CC
(opr) = 2 to 6 V
Pin and function compatible with 74LS04
TC74HC04AF
TC74HC04AFN
Pin Assignment
Weight
DIP14-P-300-2.54
SOP14-P-300-1.27A
SOL14-P-150-1.27
: 0.96 g (typ.)
: 0.18 g (typ.)
: 0.12 g (typ.)
IEC Logic Symbol
1
2007-10-01

TC74HC04AP_07 Related Products

TC74HC04AP_07 TC74HC04AF TC74HC04AP TC74HC04AFN
Description HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO14 HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO14 HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO14 HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO14
Number of functions 6 6 6 6
Number of terminals 14 14 14 14
Maximum operating temperature 85 Cel 85 °C 85 °C 85 °C
Minimum operating temperature -40 Cel -40 °C -40 °C -40 °C
surface mount Yes YES NO YES
Terminal form GULL WING GULL WING THROUGH-HOLE GULL WING
Terminal location DUAL DUAL DUAL DUAL
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
series HC/UH HC/UH HC/UH HC/UH
Is it Rohs certified? - incompatible conform to conform to
Maker - Toshiba Semiconductor Toshiba Semiconductor Toshiba Semiconductor
Parts packaging code - SOIC DIP SOIC
package instruction - SOP, SOP14,.3 DIP, DIP14,.3 SOP, SOP14,.25
Contacts - 14 14 14
Reach Compliance Code - unknow unknow unknow
JESD-30 code - R-PDSO-G14 R-PDIP-T14 R-PDSO-G14
length - 10.3 mm 19.25 mm 8.65 mm
Load capacitance (CL) - 50 pF 50 pF 50 pF
Logic integrated circuit type - INVERTER INVERTER INVERTER
MaximumI(ol) - 0.004 A 0.004 A 0.004 A
Number of entries - 1 1 1
Package body material - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code - SOP DIP SOP
Encapsulate equivalent code - SOP14,.3 DIP14,.3 SOP14,.25
Package shape - RECTANGULAR RECTANGULAR RECTANGULAR
Package form - SMALL OUTLINE IN-LINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
power supply - 2/6 V 2/6 V 2/6 V
Prop。Delay @ Nom-Su - 19 ns 19 ns 19 ns
propagation delay (tpd) - 95 ns 95 ns 95 ns
Certification status - Not Qualified Not Qualified Not Qualified
Schmitt trigger - NO NO NO
Maximum seat height - 1.9 mm 4.45 mm 1.75 mm
Maximum supply voltage (Vsup) - 6 V 6 V 6 V
Minimum supply voltage (Vsup) - 2 V 2 V 2 V
Nominal supply voltage (Vsup) - 4.5 V 4.5 V 4.5 V
technology - CMOS CMOS CMOS
Terminal pitch - 1.27 mm 2.54 mm 1.27 mm
Maximum time at peak reflow temperature - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width - 5.3 mm 7.62 mm 3.9 mm

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