TC74VHC273F/FT/FK
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74VHC273F,TC74VHC273FT,TC74VHC273FK
Octal D-Type Flip-Flop with Clear
The TC74VHC273 is an advanced high speed CMOS OCTAL
D-TYPE FLIP FLOP fabricated with silicon gate C
2
MOS
technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
Information signals applied to D inputs are transferred to the
Q outputs on the positive going edge of the clock pulse.
When the
CLR
input is held “L”, the Q outputs are at a low
logic level independent of the other inputs.
An input protection circuit ensures that 0 to 5.5 V can be
applied to the input pins without regard to the supply voltage.
This device can be used to interface 5 V to 3 V systems and two
supply systems such as battery back up. This circuit prevents
device destruction due to mismatched supply and input voltages.
TC74VHC273F
TC74VHC273FT
Features
•
•
•
•
•
•
•
•
High speed: f
max
= 165 MHz (typ.) at V
CC
= 5 V
Low power dissipation: I
CC
= 4
μA
(max) at Ta = 25°C
High noise immunity: V
NIH
= V
NIL
= 28% V
CC
(min)
Power down protection is provided on all inputs.
Balanced propagation delays: t
pLH
∼
t
pHL
−
Wide operating voltage range: V
CC (opr)
= 2 to 5.5 V
Low noise: V
OLP
= 0.9 V (max)
Pin and function compatible with 74ALS273
TC74VHC273FK
Weight
SOP20-P-300-1.27A
TSSOP20-P-0044-0.65A
VSSOP20-P-0030-0.50
: 0.22 g (typ.)
: 0.08 g (typ.)
: 0.03 g (typ.)
1
2007-10-01
TC74VHC273F/FT/FK
Pin Assignment
IEC Logic Symbol
(1)
(11)
(3)
(4)
(7)
(8)
(13)
(14)
CLR
Q1
D1
D2
Q2
Q3
D3
D4
Q4
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
(top view)
V
CC
Q8
D8
D7
Q7
Q6
D6
D5
Q5
CK
CLR
CK
D1
D2
D3
D4
D5
R
C1
1D
(2)
(5)
(6)
(9)
(12)
(15)
Q1
Q2
Q3
Q4
Q5
Q6
D6
D7
D8
(17)
(18)
(16)
(19)
Q7
Q8
GND 10
Truth Table
Inputs
CLR
Output
CK
X
Q
L
L
H
Q
n
Function
Clear
―
―
No Change
D
X
L
H
X
L
H
H
H
X: Don’t care
System Diagram
D1
3
D R
D2
4
D R
D3
7
D R
D4
8
D R
D5
13
D R
D6
14
D R
D7
17
D R
D8
18
D R
CLR
1
CK
CK
11
Q
CK
Q
CK
Q
CK
Q
CK
Q
CK
Q
CK
Q
CK
Q
2
Q1
5
Q2
6
Q3
9
Q4
12
Q5
15
Q6
16
Q7
19
Q8
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2007-10-01
TC74VHC273F/FT/FK
Absolute Maximum Ratings (Note)
Characteristics
Supply voltage range
DC input voltage
DC output voltage
Input diode current
Output diode current
DC output current
DC V
CC
/ground current
Power dissipation
Storage temperature
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
T
stg
Rating
−
0.5 to 7.0
−
0.5 to 7.0
−
0.5 to V
CC
+
0.5
−
20
±
20
±
25
±
75
Unit
V
V
V
mA
mA
mA
mA
mW
°C
180
−
65 to 150
Note:
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Operating Ranges (Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Operating temperature
Input rise and fall time
Symbol
V
CC
V
IN
V
OUT
T
opr
dt/dv
Rating
2.0 to 5.5
0 to 5.5
0 to V
CC
−
40 to 85
Unit
V
V
V
°C
ns/V
0 to 100 (V
CC
=
3.3
±
0.3 V)
0 to 20 (V
CC
=
5
±
0.5 V)
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
3
2007-10-01
TC74VHC273F/FT/FK
Electrical Characteristics
DC Characteristics
Characteristics
Symbol
Test Condition
V
CC
(V)
High-level input
voltage
2.0
V
IH
⎯
Ta
=
25°C
Min
1.50
V
CC
×
0.7
⎯
⎯
Ta
=
−
40 to 85°C
Max
⎯
⎯
Unit
Typ.
⎯
⎯
⎯
⎯
Min
1.50
V
CC
×
0.7
⎯
⎯
Max
⎯
⎯
3.0 to
5.5
2.0
V
Low-level input
voltage
0.50
V
CC
×
0.3
⎯
⎯
⎯
⎯
⎯
0.50
V
CC
×
0.3
⎯
⎯
⎯
⎯
⎯
V
IL
⎯
3.0 to
5.5
2.0
V
1.9
2.9
4.4
2.58
3.94
⎯
⎯
⎯
⎯
⎯
⎯
⎯
2.0
3.0
4.5
⎯
⎯
1.9
2.9
4.4
2.48
3.80
⎯
⎯
⎯
⎯
⎯
⎯
⎯
I
OH
= −
50
μ
A
High-level output
voltage
V
OH
V
IN
=
V
IH
or V
IL
I
OH
= −
4 mA
I
OH
= −
8 mA
I
OL
=
50
μ
A
Low-level output
voltage
V
OL
V
IN
=
V
IH
or V
IL
I
OL
=
4 mA
I
OL
=
8 mA
Input leakage
current
Quiescent supply
current
I
IN
I
CC
V
IN
=
5.5 V or GND
V
IN
=
V
CC
or GND
3.0
4.5
3.0
4.5
2.0
3.0
4.5
3.0
4.5
0 to
5.5
5.5
V
0.0
0.0
0.0
⎯
⎯
⎯
⎯
0.1
0.1
0.1
0.36
0.36
±
0.1
0.1
0.1
0.1
0.44
0.44
±
1.0
μ
A
μ
A
V
4.0
40.0
Timing Requirements
(input: t
r
=
t
f
=
3 ns)
Characteristics
Symbol
Test Condition
V
CC
(V)
Minimum pulse width (CK)
t
w (L)
t
w (H)
t
w (L)
⎯
Ta
=
25°C
Typ.
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Ta
=
−
40 to
85°C
Limit
6.5
5.0
6.0
5.0
6.5
4.5
1.0
1.0
2.5
2.0
Unit
Limit
5.5
5.0
5.0
5.0
5.5
4.5
1.0
1.0
2.5
2.0
3.3
±
0.3
5.0
±
0.5
3.3
±
0.3
5.0
±
0.5
3.3
±
0.3
5.0
±
0.5
3.3
±
0.3
5.0
±
0.5
3.3
±
0.3
5.0
±
0.5
ns
Minimum pulse width (
CLR
)
⎯
ns
Minimum set-up time
t
s
⎯
ns
Minimum hold time
t
h
⎯
ns
Minimum removal time ( CLR )
t
rem
⎯
ns
4
2007-10-01
TC74VHC273F/FT/FK
AC Characteristics
(input: t
r
=
t
f
=
3 ns)
Characteristics
Symbol
Test Condition
V
CC
(V)
Propagation delay
time
(CK-Q)
3.3
±
0.3
⎯
Ta
=
25°C
C
L
(pF)
15
50
15
50
15
50
15
50
15
50
15
50
50
50
Min
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Ta
= −
40 to
85°C
Max
13.6
17.1
9.0
11.0
13.6
17.1
8.5
10.5
⎯
⎯
⎯
⎯
Unit
Typ.
8.7
11.2
5.8
7.3
8.9
11.4
5.2
6.7
120
75
165
110
⎯
⎯
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
65
45
100
70
⎯
⎯
⎯
⎯
Max
16.0
19.5
10.5
12.5
16.0
19.5
10.0
12.0
⎯
⎯
⎯
⎯
t
pLH
t
pHL
ns
5.0
±
0.5
Propagation delay
time
(
CLR
-Q)
3.3
±
0.3
t
pHL
⎯
ns
5.0
±
0.5
3.3
±
0.3
Maximum clock
frequency
f
max
⎯
75
50
120
80
⎯
⎯
⎯
MHz
5.0
±
0.5
t
osLH
t
osHL
C
IN
C
PD
3.3
±
0.3
5.0
±
0.5
⎯
Output to output skew
Input capacitance
Power dissipation
capacitance
(Note 1)
1.5
1.0
10
⎯
1.5
1.0
10
⎯
ns
pF
pF
4
31
(Note 2)
⎯
Note 1: Parameter guaranteed by design.
t
osLH
=
|t
pLHm
−
t
pLHn
|, t
osHL
=
|t
pHLm
−
t
pHLn
|
Note 2: C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
I
CC (opr)
=
C
PD
·V
CC
·f
IN
+
I
CC
/8 (per bit)
And the total C
PD
when n pcs.of flip flop operate can be gained by the following equation:
C
PD
(total)
=
22
+
9·n
Noise Characteristics
(input: t
r
=
t
f
=
3 ns)
Characteristics
Quiet output maximum dynamic V
OL
Quiet output minimum dynamic V
OL
Minimum high level dynamic input
voltage
Maximum low level dynamic input
voltage
Symbol
V
OLP
V
OLV
V
IHD
V
ILD
C
L
=
50 pF
C
L
=
50 pF
C
L
=
50 pF
C
L
=
50 pF
Test Condition
V
CC
(V)
5.0
5.0
5.0
5.0
Ta
=
25°C
Typ.
0.5
−
0.5
⎯
⎯
Max
0.8
−
0.8
Unit
V
V
V
V
3.5
1.5
5
2007-10-01
Embedded System
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