Triple Processor Supervisors
ADM13307
FEATURES
Triple supervisory circuits
Supply voltage range of 2.0 V to 5.5 V
Pretrimmed threshold options: 1.8 V, 2.5 V, 3.3 V, and 5 V
Adjustable 0.6 V and 1.25 V voltage references
Maximum supply current of 40 μA
140 ms (minimum) reset timeout
RESET valid from V
DD
≥
1.1 V
Push-pull RESET and RESET outputs
8-lead, narrow body SOIC package
Temperature range: −40°C to +85°C
V
DD
14kΩ
MR
RESET
SENSE1
R1
R2
RESET
LOGIC + TIMER
RESET
R3
GND
1.25V
R4
FUNCTIONAL BLOCK DIAGRAMS
ADM13307-18
ADM13307-25
ADM13307-33
SENSE2
APPLICATIONS
Supervising DSPs/microcontrollers
Industrial and portable equipment
Wireless systems
Notebook/desktop computers
OSCILLATOR
GENERAL DESCRIPTION
The ADM13307 is a triple voltage supervisor designed to
monitor up to three voltage levels in DSP and microprocessor-
based systems.
There are five models available, all of which feature a combina-
tion of internally pretrimmed undervoltage threshold options
for monitoring 1.8 V, 2.5 V, 3.3 V, and 5 V supplies. There are
also two adjustable input options with undervoltage thresholds of
either 0.6 V or 1.25 V.
The ADM13307-18, ADM13307-25, and ADM13307-33
models have two internally fixed thresholds and one externally
programmable threshold via a resistor string. The ADM13307-4
and ADM13307-5 offer one internally fixed threshold and two
externally programmable thresholds. See the Ordering Guide
for a list of all available options.
During power-up, RESET is asserted when the supply voltage
exceeds 1.1 V. The device then monitors the SENSEv input
pins and holds the RESET output low as long as the SENSEv
pins remain below the rising threshold voltage, V
IT+
.
Once the supplies monitored at the SENSEv inputs rise above
their associated thresholds, the reset signal remains low for the
reset timeout period before deasserting. Subsequently, if a volt-
age monitored by the SENSEv pins falls below its associated
falling input threshold voltage, V
IT−
, the RESET output asserts.
Figure 1.
V
DD
14kΩ
MR
ADM13307-4
ADM13307-5
RESET
SENSE1
R1
GND
RESET
SENSE2
0.6V
OSCILLATOR
R2
RESET
LOGIC + TIMER
Figure 2.
The ADM13307 features both an active high RESET and an
active low RESET output.
The manual reset input of the ADM13307 can be used to initiate
a reset by means of an external push button or logic signal.
The ADM13307 is available in an 8-lead narrow body SOIC
package. The device operates over the extended industrial
temperature range of −40°C to +85°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2007 Analog Devices, Inc. All rights reserved.
06923-001
SENSE3
06923-002
SENSE3
ADM13307
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Requirements .................................................................. 5
Switching Characteristics ............................................................ 5
Functional Truth Table ................................................................ 5
Absolute Maximum Ratings............................................................ 6
Thermal Resistance .......................................................................6
ESD Caution...................................................................................6
Pin Configuration and Function Descriptions..............................7
Typical Performance Characteristics ..............................................8
Theory of Operation ...................................................................... 10
Input Configuration ................................................................... 10
Reset Output ............................................................................... 10
Manual Reset (MR) .................................................................... 10
Outline Dimensions ....................................................................... 11
Ordering Guide .......................................................................... 11
REVISION HISTORY
8/07—Revision 0: Initial Version
Rev. 0 | Page 2 of 12
ADM13307
SPECIFICATIONS
V
DD
= 2.0 V to 5.5 V, −40°C ≤ T
A
≤ +85°C, unless otherwise noted.
Table 1. ADM13307-18, ADM13307-25, and ADM13307-33
Parameter
OPERATING VOLTAGE RANGE, V
DD
SUPPLY CURRENT, I
DD
INPUT CAPACITANCE, C
I
RESET, RESET Output
High Level Output Voltage, V
OH
Min
2.0
Typ
Max
5.5
40
Unit
V
μA
pF
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
mV
mV
mV
mV
mV
V
V
Test Conditions/Comments
10
V
DD
− 0.2
V
DD
− 0.4
V
DD
− 0.4
0.2
0.4
0.4
0.4
1.22
1.64
2.20
2.86
4.46
1.22
1.64
2.20
2.86
4.46
1.25
1.68
2.25
2.93
4.55
1.25
1.68
2.25
2.93
4.55
10
15
20
30
40
1.28
1.72
2.30
3.00
4.64
1.29
1.73
2.32
3.02
4.67
V
I
= 0 V to V
DD
I
OH
= −20 μA
I
OH
= −2 mA, V
DD
= 3.3 V
I
OH
= −3 mA, V
DD
= 5.5 V
I
OL
= 20 μA
I
OL
= 2 mA, V
DD
= 3.3 V
I
OL
= 3 mA, V
DD
= 5.5 V
I
OL
= 20 μA, V
DD
≥ 1.1 V
T
A
= 0°C to 85°C
T
A
= 0°C to 85°C
T
A
= 0°C to 85°C
T
A
= 0°C to 85°C
T
A
= 0°C to 85°C
T
A
= −40°C to +85°C
T
A
= −40°C to +85°C
T
A
= −40°C to +85°C
T
A
= −40°C to +85°C
T
A
= −40°C to +85°C
V
IT−
= 1.25 V
V
IT−
= 1.68 V
V
IT−
= 2.25 V
V
IT−
= 2.93 V
V
IT−
= 4.55 V
Low Level Output Voltage, V
OL
Power-Up Reset Voltage
1
SENSE INPUTS
Falling Input Threshold Voltage, V
IT−
Hysteresis at SENSEv Inputs, V
HYS
INPUT VOLTAGE AT MR
High Level, V
IH
Low Level, V
IL
0.7 × V
DD
0.3 × V
DD
INPUT TRANSITION RISE AND FALL RATE AT MR
HIGH LEVEL INPUT CURRENT, I
H
MR
SENSE1
SENSE2
SENSE3
LOW LEVEL INPUT CURRENT, I
L
MR
SENSEv
1
50
−130
5
6
−25
−430
−25
−180
8
9
+25
−600
+25
ns/V
μA
μA
μA
nA
μA
nA
MR = 0.7 × V
DD
, V
DD
= 5.5 V
SENSE1 = V
DD
= 5.5 V
SENSE2 = V
DD
= 5.5 V
SENSE3 = V
DD
MR = 0 V, V
DD
= 5.5 V
SENSE1, SENSE2, SENSE3 = 0 V
The lowest supply voltage at which RESET becomes active. t
r
, V
DD
≥ 15 μs/V.
Rev. 0 | Page 3 of 12
ADM13307
V
DD
= 2.0 V to 5.5 V, −40°C ≤ T
A
≤ +85°C, unless otherwise noted.
Table 2. ADM13307-4 and ADM13307-5
Parameter
OPERATING VOLTAGE RANGE, V
DD
SUPPLY CURRENT, I
DD
INPUT CAPACITANCE, C
I
RESET, RESET Output
High Level Output Voltage, V
OH
Min
2.0
Typ
Max
5.5
40
Unit
V
μA
pF
V
V
V
V
V
V
V
V
V
V
V
mV
mV
mV
V
V
Test Conditions/Comments
10
V
DD
− 0.2
V
DD
− 0.4
V
DD
− 0.4
0.2
0.4
0.4
0.4
0.5946
0.5952
2.23
2.90
0.6
0.6
2.25
2.93
0
20
30
0.6048
0.6048
2.29
2.98
V
I
= 0 V to V
DD
I
OH
= −20 μA
I
OH
= −2 mA, V
DD
= 3.3 V
I
OH
= −3 mA, V
DD
= 5.5 V
I
OL
= 20 μA
I
OL
= 2 mA, V
DD
= 3.3 V
I
OL
= 3 mA, V
DD
= 5.5 V
I
OL
= 20 μA, V
DD
≥ 1.1 V
T
A
= −40°C to +85°C
T
A
= −40°C to +85°C, 2.35 V ≤ V
DD
≤ 5.5 V
T
A
= −40°C to +85°C
T
A
= −40°C to +85°C
V
IT−
= 0.6 V
V
IT−
= 2.25 V
V
IT−
= 2.93 V
Low Level Output Voltage, V
OL
Power-Up Reset Voltage
1
SENSE INPUTS
Falling Input Threshold Voltage, V
IT−
Hysteresis at SENSEv Inputs, V
HYS
INPUT VOLTAGE AT MR
High Level, V
IH
Low Level, V
IL
0.7 × V
DD
0.3 × V
DD
INPUT TRANSITION RISE AND FALL RATE AT MR
HIGH LEVEL INPUT CURRENT, I
H
MR
SENSE1
SENSE2
SENSE3
LOW LEVEL INPUT CURRENT, I
L
MR
SENSEv
1
50
−130
5
−50
−25
−430
−25
−180
8
+50
+25
−600
+25
ns/V
μA
μA
nA
nA
μA
nA
MR = 0.7 × V
DD
, V
DD
= 5.5 V
SENSE1 = V
DD
= 5.5 V
SENSE2 = V
DD
= 5.5 V
SENSE3 = V
DD
MR = 0 V, V
DD
= 5.5 V
SENSE1, SENSE2, SENSE3 = 0 V
The lowest supply voltage at which RESET becomes active. t
r
, V
DD
≥ 15 μs/V.
Rev. 0 | Page 4 of 12
ADM13307
TIMING REQUIREMENTS
V
DD
= 2.0 V to 5.5 V, R
L
= 1 MΩ, C
L
= 50 pF, T
A
= 25°C.
Table 3. ADM13307-18, ADM13307-25 and ADM13307-33
Parameter
Pulse Width (t
w
)
SENSEv
MR
Min
6
100
Typ
Max
Unit
μs
ns
Test Conditions/Comments
V
SENSEvL
= V
IT−
− 0.3 V, V
SENSEvH
= V
IT+
+ 0.3 V
V
IH
= 0.7 × V
DD
, V
IL
= 0.3 × V
DD
Table 4. ADM13307-4 and ADM13307-5
Parameter
Pulse Width (t
w
)
SENSEv
MR
Min
Typ
30
100
Max
Unit
μs
ns
Test Conditions/Comments
V
SENSEvL
= V
IT−
− 0.3 V, V
SENSEvH
= V
IT+
+ 0.3 V
V
IH
= 0.7 × V
DD
, V
IL
= 0.3 × V
DD
SWITCHING CHARACTERISTICS
V
DD
= 2.0 V to 5.5 V, R
L
= 1 MΩ, C
L
= 50 pF, T
A
= 25°C
Table 5. ADM13307-18, ADM13307-25 and ADM13307-33
Parameter
Delay
Time
(t
d
)
Propagation Delay, High-to-Low, MR to RESET
1
/RESET (t
PHL
)
Propagation Delay, Low-to-High, MR to RESET/RESET
1
(t
PLH
)
Propagation Delay, High-to-Low, SENSEv to RESET
1
/RESET (t
PHL
)
Propagation Delay, Low-to-High, SENSEv to RESET/RESET
1
(t
PLH
)
1
Min
140
Typ
200
200
200
1
1
Max
280
500
500
5
5
Unit
ms
ns
ns
μs
μs
Test Conditions/Comments
V
I(SENSEv)
≥ V
IT+
+ 0.2 V, MR ≥ 0.7 × V
DD
V
I(SENSEv)
≥ V
IT+
+ 0.2 V, V
IH
≥ 0.7 × V
DD
, V
IL
≥ 0.3 × V
DD
V
I(SENSEv)
≥ V
IT+
+ 0.2 V, V
IH
≥ 0.7 × V
DD
, V
IL
≥ 0.3 × V
DD
V
IH
= V
IT+
+ 0.3 V, V
IL
= V
IT−
− 0.3 V, MR ≥ 0.7 × V
DD
V
IH
= V
IT+
+ 0.3 V, V
IL
= V
IT−
− 0.3 V, MR ≥ 0.7 × V
DD
The reset timeout delay of 200 ms masks the propagation delay
Table 6. ADM13307-4 and ADM13307-5
Parameter
Delay
Time
(t
d
)
Propagation Delay, High-to-Low, MR to RESET
1
/RESET (t
PHL
)
Propagation Delay, Low-to-High, MR to RESET/RESET
1
(t
PLH
)
Propagation Delay, High-to-Low, SENSEv to RESET
1
/RESET (t
PHL
)
Propagation Delay, Low-to-High, SENSEv to RESET/RESET
1
(t
PLH
)
1
Min
140
Typ
200
200
200
30
30
Max
280
500
500
Unit
ms
ns
ns
μs
μs
Test Conditions/Comments
V
I(SENSEv)
≥ V
IT+
+ 0.2 V, MR ≥ 0.7 × V
DD
V
I(SENSEv)
≥ V
IT+
+ 0.2 V, V
IH
≥ 0.7 × V
DD
, V
IL
≥ 0.3 × V
DD
V
I(SENSEv)
≥ V
IT+
+ 0.2 V, V
IH
≥ 0.7 × V
DD
, V
IL
≥ 0.3 × V
DD
V
IH
= V
IT+
+ 0.3 V, V
IL
= V
IT−
− 0.3 V, MR ≥ 0.7 × V
DD
V
IH
= V
IT+
+ 0.3 V, V
IL
= V
IT−
− 0.3 V, MR ≥ 0.7 × V
DD
The reset timeout delay of 200 ms masks the propagation delay.
FUNCTIONAL TRUTH TABLE
Table 7.
MR
L
H
H
H
H
H
H
H
H
1
SENSE1 > V
IT1
X
1
0
0
0
0
1
1
1
1
SENSE2 > V
IT2
X
1
0
0
1
1
0
0
1
1
SENSE3 > V
IT3
X
1
0
1
0
1
0
1
0
1
RESET
L
L
L
L
L
L
L
L
H
RESET
H
H
H
H
H
H
H
H
L
X = don’t care.
Rev. 0 | Page 5 of 12
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