18V01SC datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > storage> 18V01SC

18V01SC: Description128K X 8 CONFIGURATION MEMORY, 15 ns, PQCC20; Categorystorage; File Size258KB，25 Pages; ManufacturerXILINX; Websitehttps://www.xilinx.com/

Download Datasheet Parametric View All

18V01SC Overview

128K X 8 CONFIGURATION MEMORY, 15 ns, PQCC20

18V01SC Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	20
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Maximum supply/operating voltage	3.6 V
Minimum supply/operating voltage	3 V
Rated supply voltage	3.3 V
maximum access time	15 ns
Processing package description	PLASTIC, LCC-20
state	ACTIVE
Craftsmanship	CMOS
packaging shape	SQUARE
Package Size	CHIP CARRIER
surface mount	Yes
Terminal form	J BEND
Terminal spacing	1.27 mm
terminal coating	TIN LEAD
Terminal location	QUAD
Packaging Materials	PLASTIC/EPOXY
Temperature level	INDUSTRIAL
memory width	8
organize	128K X 8
storage density	1.05E6 deg
operating mode	SYNCHRONOUS
Number of digits	131072 words
Number of digits	128K
Memory IC type	CONFIGURATION MEMORY
serial parallel	PARALLEL/SERIAL

Preview

Download Datasheet

View All

— PRODUCT OBSOLETE / UNDER OBSOLESCENCE —

XC18V00 Series In-System-Programmable

Configuration PROMs

Product Specification

DS026 (v6.0) August 5, 2015

Features

•

In-System Programmable 3.3V PROMs for

Configuration of Xilinx FPGAs

♦

•

Low-Power Advanced CMOS FLASH Process

Dual Configuration Modes

♦

Endurance of 20,000 Program/Erase Cycles

Program/Erase Over Full Industrial Voltage and

Temperature Range (–40

C to +85

•

Serial Slow/Fast Configuration (up to 33 MHz)

Parallel (up to 264 Mb/s at 33 MHz)

•

IEEE Std 1149.1 Boundary-Scan (JTAG) Support

JTAG Command Initiation of Standard FPGA

Configuration

Simple Interface to the FPGA

Cascadable for Storing Longer or Multiple Bitstreams

5V-Tolerant I/O Pins Accept 5V, 3.3V and 2.5V Signals

3.3V or 2.5V Output Capability

Design Support Using the Xilinx ISE™ Foundation™

Software Packages

Available in PC20, SO20, PC44, and VQ44 Packages

Lead-Free (Pb-Free) Packaging

Description

Xilinx introduces the XC18V00 series of in-system

programmable configuration PROMs (Figure

1).

Devices in

this 3.3V family include a 4-megabit, a 2-megabit, a

1-megabit, and a 512-kilobit PROM that provide an easy-to-

use, cost-effective method for reprogramming and storing

Xilinx FPGA configuration bitstreams.

When the FPGA is in Master Serial mode, it generates a

configuration clock that drives the PROM. A short access

time after CE and OE are enabled, data is available on the

PROM DATA (D0) pin that is connected to the FPGA DIN

pin. New data is available a short access time after each

rising clock edge. The FPGA generates the appropriate

number of clock pulses to complete the configuration. When

the FPGA is in Slave Serial mode, the PROM and the FPGA

are clocked by an external clock.

X-Ref Target - Figure 1

When the FPGA is in Master SelectMAP mode, the FPGA

generates a configuration clock that drives the PROM. When

the FPGA is in Slave Parallel or Slave SelectMAP mode, an

external oscillator generates the configuration clock that

drives the PROM and the FPGA. After CE and OE are

enabled, data is available on the PROM’s DATA (D0-D7)

pins. New data is available a short access time after each

rising clock edge. The data is clocked into the FPGA on the

following rising edge of the CCLK. A free-running oscillator

can be used in the Slave Parallel or Slave SelecMAP modes.

Multiple devices can be cascaded by using the CEO output

to drive the CE input of the following device. The clock

inputs and the DATA outputs of all PROMs in this chain are

interconnected. All devices are compatible and can be

cascaded with other members of the family or with the

XC17V00 one-time programmable serial PROM family.

OE/RESET

CLK

TCK

TMS

TDI

TDO

Control

and

JTAG

Interface

Data

CEO

Memory

Address

Data

Serial

Parallel

Interface

D0 DATA

Serial or Parallel Mode

D[1:7]

Parallel Interface

DS026_01_040204

Figure 1:

XC18V00 Series Block Diagram

the United States and other countries.

DS026 (v6.0) August 5, 2015

Product Specification

www.xilinx.com

Recommended Resources

MAX233-233A multi-channel data interface circuit

SL-322 integrated circuit multi-function protection circuit a

Use Y976 to make light-controlled flashing warning lights

Four octave organ circuit

Bridge voltage stabilizing circuit using voltage regulator tube

Low-pass or high-pass filter circuit using BUF-03

Question: How to use TI's TPS56xxx to power the DSP: The DSP and FPGA boards require three power supplies: 3.3V, 1.8V and 1.5V. To save costs, I decided not to use the PT69xx power chip. Can an expert tell me what kind of chip I can use? I use the TPS56...; kento Analogue and Mixed Signal

Detailed explanation of the names and functions of capacitors in different circuits: Capacitor is a kind of energy storage element, which has the characteristics of "blocking direct current and passing alternating current, and passing high frequency through negative low frequency". In...; tiankai001 Energy Infrastructure?

How to burn MSBL format firmware: The development board I have is: MAX32630FTHR The debugger is: DAP-LINK Now I have a firmware program in MSBL format, and I want to burn it into it through DAP-LINK. Is there any software that can bur...; wufeijian DIY/Open Source Hardware

Questions about S3C2410 and GPRS: I am currently using the ARM9 S3C2410 development board to do experiments. I would like to ask how the S3C2410 chip and GPRS module work. How are they accessed and controlled? Simply put, I want to un...; nicmax Embedded System

AD display problem: #include avr/io.h #include avr/interrupt.h #define F_CPU 16000000 #include util/delay.h unsigned char buffer[4]={0}; unsigned char wei_table[]={0xfe ,0xfd,0xfb,0xf7}; unsigned char data[] = {0x3f,0x06...; luckingp Microchip MCU

Where can I change the system time in the wince registry?: I want to set the system time in the wince registry and generate a NK file, so that after the NK file is re-burned, it will show the set value instead of a random value. What key can be used to change...; 阿万 Embedded System

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components