74AC541 • 74ACT541 Octal Buffer/Line Driver with 3-STATE Outputs
November 1988
Revised March 2005
74AC541 • 74ACT541
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The 74AC541 and 74ACT541 are octal buffer/line drivers
designed to be employed as memory and address drivers,
clock drivers and bus oriented transmitter/receivers.
These devices are similar in function to the 74AC244 and
74ACTC244 while providing flow-through architecture
(inputs on opposite side from outputs). This pinout arrange-
ment makes these devices especially useful as an output
port for microprocessors, allowing ease of layout and
greater PC board density.
Features
s
I
CC
and I
OZ
reduced by 50%
s
3-STATE outputs
s
Inputs and outputs opposite side of package, allowing
easier interface to microprocessors
s
Output source/sink 24 mA
s
74AC541 is a non-inverting option of the 74AC540
s
74ACT541 has TTL-compatible inputs
Ordering Code:
Order Number
74AC541SC
74AC541SJ
74AC541MTC
74AC541MTCX_NL
(Note 1)
74AC541PC
74ACT541SC
74ACT541MTC
74ACT541MTCX_NL
(Note 1)
74ACT541PC
Package
Number
M20B
M20D
MTC20
MTC20
N20A
M20B
MTC20
MTC20
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDED J-STD-020B.
Note 1:
“_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
FACT
¥
is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS009967
www.fairchildsemi.com
74AC541 • 74ACT541
Absolute Maximum Ratings
(Note 2)
Supply Voltage (V
CC
)
DC Input Diode Current (I
IK
)
V
I
V
I
0.5V to
7.0V
20 mA
20 mA
0.5V to V
CC
0.5V
20 mA
20 mA
0.5V to V
CC
0.5V
r
50 mA
r
50 mA
65
q
C to
150
q
C
140
q
C
Recommended Operating
Conditions
Supply Voltage (V
CC
)
AC
ACT
Input Voltage (V
I
)
Output Voltage (V
O
)
Operating Temperature (T
A
)
Minimum Input Edge Rate (
'
V/
'
t)
AC: V
IN
from 30% to 70% of V
CC
V
CC
@ 3.3V, 4.5V, 5.5V
ACT:V
IN
from 0.8V to 2.0V
V
CC
@ 4.5V, 5.5V
Note 2:
Absolute maximum ratings are those values beyond which dam-
age to the device may occur. The databook specifications should be met,
without exception, to ensure that the system design is reliable over its
power supply, temperature, and output/input loading variables. Fairchild
does not recommend operation of FACT
¥
circuits outside databook specifi-
cations.
0.5V
V
CC
0.5V
2.0V to 6.0V
4.5V to 5.5V
0V to V
CC
0V to V
CC
DC Input Voltage (V
I
)
DC Output Diode Current (I
OK
)
V
O
V
O
0.5V
V
CC
0.5V
40
q
C to
85
q
C
125 mV/ns
DC Output Voltage (V
O
)
DC Output Source
or Sink Current (I
O
)
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
)
Storage Temperature (T
STG
)
Junction Temperature (T
J
)
PDIP
DC Electrical Characteristics for AC
Symbol
V
IH
Parameter
Minimum HIGH Level
Input Voltage
V
IL
Maximum LOW Level
Input Voltage
V
OH
Minimum HIGH Level
Output Voltage
V
CC
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
V
OL
Maximum LOW Level
Output Voltage
3.0
4.5
5.5
3.0
4.5
5.5
I
IN
(Note 5)
I
OZ
Maximum Input Leakage Current
Maximum 3-STATE
Leakage Current
I
OLD
I
OHD
Minimum Dynamic
Output Current (Note 4)
5.5
5.5
5.5
5.5
4.0
5.5
0.002
0.001
0.001
T
A
Typ
1.5
2.25
2.75
1.5
2.25
2.75
2.99
4.49
5.49
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.56
3.86
4.86
0.1
0.1
0.1
0.36
0.36
0.36
25
q
C
T
A
40
q
C to
85
q
C
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
Units
V
OUT
V
Conditions
0.1V
Guaranteed Limits
or V
CC
0.1V
V
OUT
V
0.1V
or V
CC
0.1V
V
I
OUT
V
IN
50
P
A
V
IL
or V
IH
2.46
3.76
4.76
0.1
0.1
0.1
V
I
OH
I
OH
I
OH
12 mA
24 mA
24 mA (Note 3)
50
P
A
V
IL
or V
IH
12 mA
24 mA
24 mA (Note 3)
V
CC
, GND
V
IL
, V
IH
V
CC
, GND
V
CC
, GND
1.65V Max
3.85V Min
V
CC
or GND
V
I
OUT
V
IN
0.44
0.44
0.44
V
I
OL
I
OL
I
OL
V
I
V
I
V
O
r
0.1
r
0.25
r
1.0
r
2.5
75
P
A
P
A
mA
mA
V
I
(OE)
V
OLD
V
OHD
V
IN
75
40.0
I
CC
(Note 5) Maximum Quiescent Supply Current
P
A
Note 3:
All outputs loaded; thresholds on input associated with output under test.
Note 4:
Maximum test duration 2.0 ms, one output loaded at a time.
Note 5:
I
IN
and I
CC
@ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V
CC
.
3
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74AC541 • 74ACT541
AC Electrical Characteristics for AC
V
CC
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Parameter
Propagation Delay
Data to Output
Propagation Delay
Data to Output
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
(V)
(Note 6)
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
Note 6:
Voltage Range 3.3 is 3.3V
r
0.3V
Voltage Range 5.0 is 5.0V
r
0.5V
T
A
C
L
Min
2.0
1.5
2.0
1.5
3.0
2.0
2.5
1.5
3.5
2.0
2.5
2.0
25
q
C
50 pF
Typ
5.5
4.0
5.5
4.0
8.0
6.0
7.0
5.5
9.0
7.0
6.5
5.5
Max
8.0
6.0
8.0
6.0
11.5
8.5
10.0
7.5
12.5
9.5
9.5
7.5
T
A
40
q
C to
85
q
C
C
L
50 pF
Max
9.0
6.5
8.5
6.5
12.5
9.5
11.5
8.5
14.0
10.5
10.5
8.5
ns
ns
ns
ns
ns
ns
Units
Min
1.5
1.0
1.5
1.0
3.0
1.5
2.5
1.0
2.5
1.0
2.0
1.0
DC Electrical Characteristics for ACT
Symbol
V
IH
V
IL
V
OH
Parameter
Minimum HIGH Level
Input Voltage
Maximum LOW Level
Input Voltage
Minimum HIGH Level
Output Voltage
V
CC
(V)
4.5
5.5
4.5
5.5
3.0
4.5
4.5
5.5
V
OL
Maximum LOW Level
Output Voltage
3.0
4.5
4.5
5.5
I
IN
I
OZ
I
CCT
I
OLD
I
OHD
I
CC
Maximum Input
Leakage Current
Maximum 3-STATE
Leakage Current
Maximum I
CC
/Input
Minimum Dynamic
Output Current (Note 8)
Maximum Quiescent
Supply Current
Note 7:
All outputs loaded; thresholds on input associated with output under test.
Note 8:
Maximum test duration 2.0 ms, one output loaded at a time.
T
A
Typ
1.5
1.5
1.5
1.5
2.99
4.49
25
q
C
2.0
2.0
0.8
0.8
2.9
4.4
3.86
4.86
T
A
40
q
C to
85
q
C
2.0
2.0
0.8
0.8
2.9
4.4
3.76
4.76
0.1
0.1
0.44
0.44
Guaranteed Limits
Units
V
V
V
V
OUT
V
OUT
I
OUT
V
IN
V
I
OH
I
OH
I
OUT
V
IN
V
I
OH
I
OH
V
I
V
I
V
O
V
I
V
OLD
V
OHD
V
IN
Conditions
0.1V
0.1V
or V
CC
0.1V
or V
CC
0.1V
50
P
A
V
IL
or V
IH
24 mA
24 mA (Note 7)
50
P
A
V
IL
or V
IH
24 mA
24 mA (Note 7)
V
CC
, GND
V
IL
, V
IH
V
CC
, GND
V
CC
2.1V
1.65V Max
3.85V Min
V
CC
or GND
0.002
0.001
0.1
0.1
0.36
0.36
V
5.5
5.5
5.5
5.5
5.5
5.5
0.6
r
0.1
r
0.25
r
1.0
r
2.5
1.5
75
P
A
P
A
mA
mA
mA
75
4.0
40.0
P
A
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4
Embedded System
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