Semiconductor
April 1999
CT
ODU ODUCT
R
PR
TE P
OLE TITUTE 509(A)
S
OB
BS
I-0
E SU 509A, H
BL DG
SI
POS G409,
D
IH6208
8-Channel
CMOS Analog Multiplexer
Features
• Ultra Low Leakage - I
D(OFF)
≤
100pA (Typ)
• r
DS(ON)
< 400Ω Over Full Signal and Temperature
Range
• Power Supply Quiescent Current Less Than 100µA
•
±14V
Analog Signal Range
• No SCR Latchup
• Break-Before-Make Switching
• Binary Address Control (2 Address Inputs Control 2
Out of 8 Channels)
• TTL and CMOS Compatible Address Control
• Pin Compatible with DG509A, HI-509 and ADG509A
• Internal Diode in Series with V+ for Fault Protection
Description
The IH6208 is a CMOS 2 of 8 multiplexer. The part is a
plug-in replacement for the DG509A. Two-line binary
decoding is used so that the 8 channels can be controlled in
pairs by the binary inputs; additionally a third input is
provided for use as a system enable. When the ENABLE
input is high (5V), the channels are sequenced by the 2 line
binary inputs, and when low (0V) all channels are off. The 2
Address inputs arecontrolled by TTL logic or CMOS logic
elements with a “0” corresponding to any voltage less than
0.8V and a “1” corresponding to any voltage greater than
2.4V. Note that the ENABLE input must be taken to 5V to
enable the system, and less than 0.8V to disable the system.
Part Number Information
PART
NUMBER
IH6208MJE
IH6208MJE/883B
IH6208MFE/883B
IH6208CJE
IH6208CPE
TEMP.
RANGE (
o
C)
-55 to 125
-55 to 125
-55 to 125
0 to 70
0 to 70
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld Flat Pack
16 Ld CERDIP
16 Ld PDIP
PKG.
NO.
F16.3
F16.3
K16.A
F16.3
E16.3
Pinout
IH6208
(CERDIP, PDIP)
TOP VIEW
A
0
1
EN 2
V- 3
S
1a
4
S
2a
5
S3a 6
S
4a
7
D
a
8
16 A
1
15 GND
14 V+
13 S
1b
12 S
2b
11 S
3b
10 S
4b
9 D
b
Functional Diagram
S
1a
S
2a
S
3a
S
4a
S
1b
S
2b
S
3b
S
4b
A
0
A
1
EN
2 LINE BINARY ADDRESS INPUTS
(0 0) AND EN = 5V (EN = “1” for +5V, “0” for 0V)
ABOVE EXAMPLE SHOWS
CHANNELS 1a AND 1b ON.
D
a
Db
ADDRESS DECODER
1 OF 4
ENABLE
INPUT
TRUTH TABLE
A
1
x
0
0
1
1
A
0
x
0
1
0
1
EN
0
1
1
1
1
ON SWITCH PAIR
None
1a, 1b
2a, 2b
3a, 3b
4a, 4b
NOTE: A
0
, A
1
Logic “1” = V
AH
≥
2.4V, V
ENH
≥
4.5V
Logic “0” = V
AL
≤
0.8V.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
©
Harris Corporation 1997
File Number
3157.2
12-129
IH6208
Absolute Maximum Ratings
V
IN
(A, EN) to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . -15V to 15V
V
S
or V
D
to V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V, -36V
V
S
to V
D
to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V, 36V
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18V
V- to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-18V
Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
Current (Analog Source or Drain) . . . . . . . . . . . . . . . . . . . . . . 20mA
Thermal Information
Thermal Resistance (Typical, Note 1)
θ
JA
(
o
C/W)
θ
JC
(
o
C/W)
CERDIP Package . . . . . . . . . . . . . . . .
80
22
Ceramic Flatpack Package . . . . . . . . .
85
25
PDIP Package . . . . . . . . . . . . . . . . . . .
100
N/A
Maximum Junction Temperature (Hermetic Package) . . . . . . . . 175
o
C
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . .-65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300
o
C
Operating Conditions
Temperature Range
C Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0
o
C to 70
o
C
M Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
V+ = 15V, V- = -15V, V
EN
= +5V, Ground = 0V, Unless Otherwise Specified, (Note 4)
NO
TESTS
PER
TEMP
M SUFFIX (
o
C)
TYP
25
o
C
C SUFFIX (
o
C)
PARAMETER
SWITCH
r
DS(ON)
MEASURED
TERMINAL
TEST CONDITIONS
-55
25
125
0
25
70
UNITS
S to D
8
180
V
D
= +10V, I
S
= -1.0mA
Sequence Each Switch On
V
AL
= 0.8V, V
AH
= 2.4V
V
D
= -10V, I
S
= -1.0mA
Sequence Each Switch On
V
AL
= 0.8V, V
AH
= 2.4V
∆r
DS(ON)
=
r
DS
(
ON
)
MAX
–
r
DS
(
ON
)
M I N
-----------------------------------------------------------------------------------,
r
DS
(
ON
)
AV G
V
S
=
±10V
300
300
400
350
350
450
Ω
8
150
300
300
400
350
350
450
Ω
∆r
DS(ON)
20
-
-
-
-
-
-
%
I
S(OFF)
S
8
8
0.002
0.002
0.03
0.03
0.1
V
S
= 10V, V
D
= -10V
V
S
= -10V, V
D
= 10V,
V
EN
= 0.8V
V
D
= 10V, V
S
= -10V,
V
EN
= 0.8V
V
D
= -10V, V
S
= 10V,
V
EN
= 0.8V
V
S(ALL)
= V
D
= 10V,
Sequence Each Switch On
V
AL
= 0.8V, V
AH
= 2.4V
V
S(ALL)
= -10V,
Sequence Each Switch On
V
AL
= 0.8V, V
AH
= 2.4V
-
-
-
-
-
±0.5
±0.5
±2
±2
±2
±50
±50
±50
±50
±50
-
-
-
-
-
±1
±1
±5
±5
±5
±50
±50
±100
±100
±100
nA
nA
nA
nA
nA
I
D(OFF)
D
2
2
I
D(ON)
D
8
8
0.1
-
±2
±50
-
±5
±100
nA
INPUT
I
AN(ON)
I
AN(OFF)
I
A
A
0
, A
1
EN
A
0
, A
1
2
2
2
1
0.01
0.01
0.01
0.01
V
A
= 0V
V
A
= 14V
V
EN
= 5V, All V
A
= 0V
(Address Pins)
V
EN
= 0V, All V
A
= 0V
(Address Pins)
-
-
-
-
-10
10
-10
-10
-30
30
-30
-30
-
-
-
-
-10
10
-10
-10
-30
30
-30
-30
µA
µA
µA
µA
12-130
IH6208
Electrical Specifications
V+ = 15V, V- = -15V, V
EN
= +5V, Ground = 0V, Unless Otherwise Specified, (Note 4)
(Continued)
NO
TESTS
PER
TEMP
M SUFFIX (
o
C)
TYP
25
o
C
C SUFFIX (
o
C)
PARAMETER
DYNAMIC
t
TRANSITION
t
OPEN
t
EN(ON)
t
EN(OFF)
“OFF” Isolation
MEASURED
TERMINAL
TEST CONDITIONS
-55
25
125
0
25
70
UNITS
D
D
D
D
D
0.3
0.2
0.6
0.4
60
See Figure 1
See Figure 2
See Figure 3
See Figure 3
V
EN
= 0V, R
L
= 200Ω,
C
L
= 3pF, V
S
= 3V
RMS
,
f = 500kHz
V
S
= 0V, V
EN
= 0V,
f = 140kHz to 1MHz
V
D
= 0V, V
EN
= 0V,
f = 140kHz to 1MHz
V
S
= 0V, V
D
= 0V,
V
EN
= 0V,
f = 140kHz to 1MHz
-
-
-
-
-
1
-
1.5
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
µs
µs
µs
µs
dB
C
S(OFF)
C
D(OFF)
C
DS(OFF)
S
D
D to S
5
12
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
pF
pF
pF
SUPPLY
Positive Supply
Current
Negative Supply
Current
Positive Standby
Current
Negative Standby
Current
NOTE:
2. See “Enable Input Strobing Levels” in Application Section.
V+
V-
V+
V-
1
1
1
1
40
2
1
1
V
EN
= 5V,
All V
A
= 0V or 5V
V
EN
= 5V,
All V
A
= 0V or 5V
V
EN
= 0V,
All V
A
= 0V or 5V
V
EN
= 0V,
All V
A
= 0V or 5V
-
-
-
-
-
-
-
-
200
100
100
100
-
-
-
-
-
-
-
-
1000
1000
1000
1000
µA
µA
µA
µA
Switching Information
+15V
D1
S
1a
S
2a
S
IH6208
3a
S
4a
S
1b
A
1
S
2b
A
0
S
3b
S
4b
EN
GND
+5V
-15V
V-
D
2
R
P
C
P
PROBE IMPEDANCE
R
P
≥
1MΩ
C
P
≤
30pF
V
OUT
V+
3.0V
1.4V
0.8V
0
±10V
V
S1b
0.9V
S1b
0
PROBE
0.9V
S4b
V
S4b
S
1b(ON)
V
A
50Ω
±10V
t
trans
S
4b(ON)
t
trans
FIGURE 1. t
TRANSITION
SWITCHING TEST CIRCUIT AND WAVEFORMS
12-131
IH6208
Switching Information
S
1b
S
2b
THRU
S
3b
IH6208
S
4b
D
2
200Ω
GND
-15V
(Continued)
+15V
-2V
SWITCH
OUTPUT
V
OUT
(SEE PINOUT)
V
OUT
35pF
V
A
+0.8V
+3V
50%
t
OPEN
t
OPEN
A
1
A
0
V
A
+5V
EN
0
0.9V
O
V
O
V
S
FIGURE 2. t
OPEN
(BREAK-BEFORE-MAKE) SWITCHING TEST CIRCUIT AND WAVEFORMS
+15V
V
EN
A
1
A
0
EN
V
EN
GND
S
1b
ALL
OTHERS
IH6208
S
4b
D
2
200Ω
-15V
V
OUT
35pF
-5V
t
r
and t
f
≤
100ns
0V
0.1V
O
SWITCH
OUTPUT
V
OUT
(SEE FIGURE 1)
0.9V
O
V
O
-5V
+0.8V
t
EN(ON)
+5V
50%
t
EN(OFF)
FIGURE 3. t
ON
AND t
OFF
SWITCHING TEST CIRCUIT AND WAVEFORMS
IH6208 Application Information
ENABLE Input Strobing Levels
The ENABLE input on the IH6208 requires a minimum of
+4.5V to trigger to the “1” state and a maximum of +0.8V to
trigger to the “0” state. If the ENABLE input is being driven
from TTL logic, a pull-up resistor of 1kΩ to 3kΩ is required
from the gate output to +5V supply. (See Figure 4)
When the EN in put is driven from CMOS logic, no pullup is
necessary, see Figure 5.
The supply voltage of the CD4009 affects the switching
speed of the IH6208; the same is true for TTL supply voltage
levels. The following chart shows the effect, on t
trans
for a
supply varying from +4.5V to +5.5V.
CMOS OR TTL
SUPPLY VOLTAGE
TYPICAL T
TRANS
AT 25
o
C
Using the IH6208 with Supplies Other Than
±15V
The IH6208 can be used with power supplies ranging from
±6V
to
±16V.
The switch r
DS(ON)
will increase as the supply
voltages decrease, however, the multiplexer error term (the
product of leakage times r
DS(ON)
) will remain approximately
constant since leakage decreases as the supply voltages
are reduced.
Caution must be taken to ensure that the enable (EN)
voltage is at least 0.7V below V+ at all times. If this is not
done, the Address input strobing levels will not function
properly. This may be achieved quite simply by connecting
EN (pin 2) to V+ (pin 14) via a silicon diode as shown in
Figure 6. When using this type of configuration, a further
requirement must be met: the strobe levels of A0 and A1
must be within 2.5V of the EN voltage in order to define a
binary “1” state. For the case shown in Figure 6 the EN
voltage is 11.3V which means that logic high at A0 and A1 is
+8.8V (logic low continues to be 0.8V). In this configuration
the IH6208 cannot be driven by TTL (+5V) or CMOS (+5V)
logic. It can be driven by TTL open collector logic or CMOS
logic with +12V supplies.
If the logic and the IH6208 have common supplies, the EN
pin should again be connected to the supply through a
silicon diode. In this case, tying EN to the logic supply
directly will not work since it violates the 0.7V differential
voltage required between V+ and EN, (See Figure 7). A 1µF
capacitor can be placed across the diode to minimize
switching glitches.
+4.5V
+4.75V
+5.00V
+5.25V
+5.50V
400ns
300ns
250ns
200ns
175ns
The throughput rate can therefore be maximized by using a
+5V to +5.5V supply for the ENABLE Strobe Logic.
The examples shown in Figure 4 and 5 deal with ENABLE
strobing when expansion to more than eight channels is
required. In these cases the EN terminal acts as a fourth
address input. If eight channels or less are being
multiplexed, the EN terminal can be directly connected to
+5V logic supply to enable the IH6208 at all times.
12-132
IH6208
Switching Information
1
2
3
4
5
6
7
DM7404N
TTL LOGIC
14
13
12
11
10
9
8
+3V
0V
+5V
1kΩ
A
0
1
EN
2
-15V 3
S
1a
4
S
2a
5
S
3a
6
S
4a
7
D
1
8
IH6208
16 A
1
15
14 +15V
13 S
1b
12 S
2b
11 S
3b
10 S
4b
9 D
2
FIGURE 4. ENABLE INPUT STROBING FROM TTL LOGIC
+5V
1
2
3
16
15
14
CD4009
4 CMOS LOGIC 13
5
6
7
8
12
11
10
9
A
0
1
EN
2
-15V 3
S
1a
4
S
2a
5
S
3a
6
S
4a
7
D
1
8
IH6208
16 A
1
15
14 +15V
13 S
1b
12 S
2b
11 S
3b
10 S
4b
9 D
2
FIGURE 5. CMOS LOGIC DRIVING ENABLE PIN
1N914
A
0
1
EN
2
-12V 3
4
5
IH6208
16 A
1
15
14
13
12
11
10
9 D
2
= B CHANNEL DRAIN OUTPUT (COMMON)
B CHANNEL SOURCE INPUTS
+12V
A CHANNEL SOURCE INPUTS
6
7
A CHANNELS COMMON DRAIN OUTPUT = D
1
8
FIGURE 6. IH6208 CONNECTION DIAGRAM FOR LESS THAN
±15V
SUPPLY OPERATION
12-133
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