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74F74PCX

Description
F/FAST SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
Categorysemiconductor    logic   
File Size74KB,7 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
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74F74PCX Overview

F/FAST SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14

74F74PCX Parametric

Parameter NameAttribute value
Number of functions2
Number of terminals14
Maximum operating temperature70 Cel
Minimum operating temperature0.0 Cel
Maximum supply/operating voltage5.5 V
Minimum supply/operating voltage4.5 V
Rated supply voltage5 V
Processing package description0.150 INCH, MS-120, SOIC-14
Lead-freeYes
EU RoHS regulationsYes
stateDISCONTINUED
CraftsmanshipTTL
packaging shapeRectangle
Package SizeSMALL OUTLINE
surface mountYes
Terminal formGULL WING
Terminal spacing1.27 mm
terminal coatingMATTE Tin
Terminal locationpair
Packaging MaterialsPlastic/Epoxy
Temperature levelCOMMERCIAL
seriesF/FAST
Logic IC typeD flip-flop
Number of digits1
Output polarityCOMPLEMENTARY
propagation delay TPD9.2 ns
Trigger typePOSITIVE edge
Max-Min frequency100 MHz
74F74 Dual D-Type Positive Edge-Triggered Flip-Flop
April 1988
Revised September 2000
74F74
Dual D-Type Positive Edge-Triggered Flip-Flop
General Description
The F74 is a dual D-type flip-flop with Direct Clear and Set
inputs and complementary (Q, Q) outputs. Information at
the input is transferred to the outputs on the positive edge
of the clock pulse. Clock triggering occurs at a voltage level
of the clock pulse and is not directly related to the transition
time of the positive-going pulse. After the Clock Pulse input
threshold voltage has been passed, the Data input is
locked out and information present will not be transferred to
the outputs until the next rising edge of the Clock Pulse
input.
Asynchronous Inputs:
LOW input to S
D
sets Q to HIGH level
LOW input to C
D
sets Q to LOW level
Clear and Set are independent of clock
Simultaneous LOW on C
D
and S
D
makes both Q and Q HIGH
Ordering Code:
Order Number
74F74SC
74F74SJ
74F74PC
Package Number
M14A
M14D
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 2000 Fairchild Semiconductor Corporation
DS009469
www.fairchildsemi.com

74F74PCX Related Products

74F74PCX 74F74SCX 74F74
Description F/FAST SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 F/FAST SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 Dual D-type flip-flop
Number of functions 2 2 -
Number of terminals 14 14 -
Maximum operating temperature 70 Cel 70 °C -
surface mount Yes YES -
Terminal form GULL WING GULL WING -
Terminal location pair DUAL -
Temperature level COMMERCIAL COMMERCIAL -
series F/FAST F/FAST -
Number of digits 1 1 -
Output polarity COMPLEMENTARY COMPLEMENTARY -
Trigger type POSITIVE edge POSITIVE EDGE -
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