K8D6x16UTM / K8D6x16UBM
NOR FLASH MEMORY
64M Bit (8M x8/4M x16) Dual Bank NOR Flash Memory
FEATURES
•
Single Voltage, 2.7V to 3.6V for Read and Write operations
•
Organization
8,388,608 x 8 bit (Byte mode) / 4,194,304 x 16 bit (Word mode)
•
Fast Read Access Time : 70ns
•
Read While Program/Erase Operation
•
Dual Bank architectures
Bank 1 / Bank 2 : 16Mb / 48Mb
•
Secode(Security Code) Block : Extra 64K Byte block
•
Power Consumption (typical value @5MHz)
- Read Current : 14mA
- Program/Erase Current : 15mA
- Read While Program or Read While Erase Current : 25mA
- Standby Mode/Auto Sleep Mode : 10µA
•
WP/ACC input pin
- Allows special protection of two outermost boot blocks at V
IL
,
regardless of block protect status
- Removes special protection of two outermost boot block at V
IH,
the two blocks return to normal block protect status
- Program time at V
HH
: 9µs/word
•
Erase Suspend/Resume
•
Unlock Bypass Program
•
Hardware RESET Pin
•
Command Register Operation
•
Block Group Protection / Unprotection
•
Supports Common Flash Memory Interface
•
Industrial Temperature : -40°C to 85°C
•
Endurance : 100,000 Program/Erase Cycles Minimum
•
Data Retention : 10 years
•
Package : 48 Pin TSOP1 : 12 x 20 mm / 0.5 mm Pin pitch
48 Ball TBGA : 6 x 9 mm / 0.8 mm Ball pitch
48 Ball FBGA : 6 x 9 mm / 0.8 mm Ball pitch
GENERAL DESCRIPTION
The K8D6316U featuring single 3.0V power supply, is a 64Mbit
NOR-type Flash Memory organized as 8Mx8 or 4M x16. The
memory architecture of the device is designed to divide its
memory arrays into 135 blocks to be protected by the block
group. This block architecture provides highly flexible erase and
program capability. The K8D6316U NOR Flash consists of two
banks. This device is capable of reading data from one bank
while programming or erasing in the other bank. Access times
of 70ns, 80ns and 90ns are available for the device. The
device′s fast access times allow high speed microprocessors to
operate without wait states. The device performs a program
operation in units of 8 bits (Byte) or 16 bits (Word) and erases in
units of a block. Single or multiple blocks can be erased. The
block erase operation is completed within typically 0.7 sec. The
device requires 15mA as program/erase current in the standard
and industrial temperature ranges.
The K8D6316U NOR Flash Memory is created by using Sam-
sung's advanced CMOS process technology. This device is
available in 48 pin TSOP1 and 48 ball TBGA,FBGA packages.
The device is compatible with EPROM applications to require
high-density and cost-effective nonvolatile read/write storage
solutions.
PIN DESCRIPTION
Pin Name
A0 - A21
Pin Function
Address Inputs
Data Inputs / Outputs
DQ15 Data Input / Output
A-1 LSB Address
Word / Byte Selection
Chip Enable
Output Enable
Hardware Reset Pin
Ready/Busy Output
Write Enable
Hardware Write Protection/Program
Acceleration
Power Supply
Ground
No Connection
PIN CONFIGURATION
A15
A14
A13
A12
A11
A10
A9
A8
A19
A20
WE
RESET
A21
WP/ACC
RY/BY
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
BYTE
Vss
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
Vcc
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE
Vss
CE
A0
DQ0 - DQ14
DQ15/A-1
BYTE
CE
OE
RESET
RY/BY
WE
WP/ACC
Vcc
V
SS
N.C
48-pin TSOP1
Standard Type
12mm x 20mm
Note :
Please refer to the package dimension.
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
2
Revision 1.6
September, 2006
FPGA/CPLD
京公网安备 11010802033920号
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