Intel
®
Server Board S1200V3RP
Technical Product Specification
Intel reference number G84364-003
Revision 1.1
October, 2013
Enterprise Platforms and Services Division - Marketing
Revision History
Intel®
Server Board S1200V3RP TPS
Revision History
Date
November 2012
May 2013
October 2013
Revision
Number
0.5
1.0
1.1
Modifications
Preliminary release.
Updated BIOS Setup Interface
Changed the chipset of S1200V3RPL to C226
Updated Graphics Controller and Video output: Changed the supporting OS
for pGFX Display Port video output to Microsoft Windows 7*.
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Revision 1.1
Intel®
Server Board S1200V3RP TPS
Disclaimers
Disclaimers
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS
GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR
SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR
IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR
WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR
INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
A "Mission Critical Application" is any application in which failure of the Intel Product could result, directly or indirectly,
in personal injury or death. SHOULD YOU PURCHASE OR USE INTEL'S PRODUCTS FOR ANY SUCH MISSION
CRITICAL APPLICATION, YOU SHALL INDEMNIFY AND HOLD INTEL AND ITS SUBSIDIARIES,
SUBCONTRACTORS AND AFFILIATES, AND THE DIRECTORS, OFFICERS, AND EMPLOYEES OF EACH,
HARMLESS AGAINST ALL CLAIMS COSTS, DAMAGES, AND EXPENSES AND REASONABLE ATTORNEYS'
FEES ARISING OUT OF, DIRECTLY OR INDIRECTLY, ANY CLAIM OF PRODUCT LIABILITY, PERSONAL
INJURY, OR DEATH ARISING IN ANY WAY OUT OF SUCH MISSION CRITICAL APPLICATION, WHETHER OR
NOT INTEL OR ITS SUBCONTRACTOR WAS NEGLIGENT IN THE DESIGN, MANUFACTURE, OR WARNING OF
THE INTEL PRODUCT OR ANY OF ITS PARTS.
Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not
rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined". Intel reserves
these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from
future changes to them. The information here is subject to change without notice. Do not finalize a design with this
information.
The products described in this document may contain design defects or errors known as errata which may cause the
product to deviate from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your
product order.
Copies of documents which have an order number and are referenced in this document, or other Intel literature, may
be obtained by calling 1-800-548-4725, or go to:
http://www.intel.com/design/literature.htm
Revision 1.1
iii
Table of Contents
Intel®
Server Board S1200V3RP TPS
Table of Contents
1. Introduction ........................................................................................................................ 1
1.1
Chapter Outline ...................................................................................................... 1
1.2
Server Board Use Disclaimer ................................................................................. 2
2. Overview ............................................................................................................................. 3
2.1
Intel
®
Server Boards S1200V3RP product family Feature Set ................................ 3
2.2
Server Board Layout .............................................................................................. 5
2.2.1
Server Board Connector and Component Layout ................................................... 5
2.2.2
Server Board Mechanical Drawings ....................................................................... 8
2.2.3
Server Board Rear I/O Layout .............................................................................. 11
3. Functional Architecture ................................................................................................... 12
3.1
Processor Subsystem .......................................................................................... 12
3.1.1
Intel
®
Xeon
®
processor E3-1200 V3 product family............................................... 13
3.1.2
The 4
th
Generation Intel
®
Core
™
i3 Processors ..................................................... 13
3.2
Processor Function Overview ............................................................................... 13
3.3
Integrated Memory Controller (IMC) and Memory Subsystem .............................. 14
3.3.1
Supported Memory ............................................................................................... 15
3.3.2
Memory RAS Features ......................................................................................... 17
3.3.3
Post Error Codes.................................................................................................. 18
3.3.4
Processor Integrated I/O Module (IIO) .................................................................. 18
3.3.5
Intel
®
Integrated RAID Option ............................................................................... 20
3.3.6
Optional I/O Module Support ................................................................................ 20
3.3.7
Intel
®
I/O Acceleration Technolgy 2 (Intel
®
I/O AT2) ............................................. 21
3.4
Intel
®
C220 series Chipset PCH Functional Overview .......................................... 21
3.4.1
Digital Media Interface (DMI) ................................................................................ 22
3.4.2
PCI Express* Interface ......................................................................................... 22
3.4.3
Serial ATA (SATA) Controller ............................................................................... 22
3.4.4
Low Pin Count (LPC) Interface ............................................................................. 23
3.4.5
Serial Peripheral Interface (SPI) ........................................................................... 24
3.4.6
Universal Serial Bus (USB) Controller .................................................................. 24
3.4.7
Gigabit Ethernet Controller ................................................................................... 25
3.4.8
Enhanced Power Management ............................................................................ 26
3.4.9
Serial Ports .......................................................................................................... 26
3.4.10 KVM/Serial Over LAN (SOL) Function .................................................................. 26
3.4.11 System Management Bus (SMBus* 2.0) .............................................................. 27
3.4.12 Intel
®
Virtualization Technology for Direct I/O (Intel
®
VT-d) ................................... 27
3.5
Integrated Baseboard Management Controller (BMC) Overview .......................... 27
3.5.1
Super I/O Controller ............................................................................................. 29
3.5.2
Graphics Controller and Video Support ................................................................ 29
3.5.3
Baseboard Management Controller ...................................................................... 31
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Revision 1.1
Intel®
Server Board S1200V3RP TPS
Table of Contents
4. System Security................................................................................................................ 33
4.1
BIOS Password Protection ................................................................................... 33
4.2
Trusted Platform Module (TPM) Support .............................................................. 34
4.2.1
TPM security BIOS ............................................................................................... 34
4.2.2
Physical Presence ................................................................................................ 35
4.2.3
TPM Security Setup Options ................................................................................ 35
4.3
Intel
®
Trusted Execution Technology .................................................................... 37
5. Intel
®
Technology Support ............................................................................................... 38
5.1
Intel
®
Trusted Execution Technology .................................................................... 38
5.2
Intel
®
Virtualization Technology – Intel
®
VT-x/VT-d/VT-c ...................................... 38
5.3
Intel
®
Intelligent Power Node Manager ................................................................. 39
5.3.1
Hardware Requirements ...................................................................................... 41
6. Platform Management Functional Overview ................................................................... 42
6.1
Baseboard Management Controller (BMC) Firmware Feature Support................. 42
6.1.1
IPMI 2.0 Features................................................................................................. 42
6.1.2
Non-IPMI Features ............................................................................................... 43
6.2
Basic and Advanced Features.............................................................................. 44
6.3
Advanced Configuration and Power Interface (ACPI) ........................................... 45
6.4
Power Control Sources ........................................................................................ 46
6.5
BMC Watchdog .................................................................................................... 46
6.6
Fault Resilient Booting (FRB) ............................................................................... 47
6.7
Sensor Monitoring ................................................................................................ 47
6.8
Field Replaceable Unit (FRU) Inventory Device ................................................... 48
6.9
System Event Log (SEL) ...................................................................................... 48
6.10
System Fan Management .................................................................................... 48
6.10.1 Thermal and Acoustic Management ..................................................................... 48
6.10.2 Thermal Sensor Input to Fan Speed Control ........................................................ 49
6.10.3 Fan Profiles .......................................................................................................... 50
6.10.4 Memory Thermal Throttling .................................................................................. 51
6.11
Messaging Interfaces ........................................................................................... 52
6.11.1 User Model ........................................................................................................... 52
6.11.2 IPMB Communication Interface ............................................................................ 53
6.11.3 LAN Interface ....................................................................................................... 53
6.11.4 Address Resolution Protocol (ARP)...................................................................... 59
6.11.5 Internet Control Message Protocol (ICMP) ........................................................... 59
6.11.6 Virtual Local Area Network (VLAN) ...................................................................... 59
6.11.7 Secure Shell (SSH) .............................................................................................. 60
6.11.8 Serial-over-LAN (SOL 2.0) ................................................................................... 60
6.11.9 Platform Event Filter (PEF)................................................................................... 60
6.11.10 LAN Alerting ......................................................................................................... 61
6.11.11 Alert Policy Table ................................................................................................. 62
Revision 1.1
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