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MUN5313DW1T1G

Description
Bipolar Transistors - Pre-Biased SS BR XSTR DUAL 50V
CategoryDiscrete semiconductor    The transistor   
File Size104KB,10 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
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MUN5313DW1T1G Overview

Bipolar Transistors - Pre-Biased SS BR XSTR DUAL 50V

MUN5313DW1T1G Parametric

Parameter NameAttribute value
Brand NameON Semiconductor
Is it lead-free?Lead free
MakerON Semiconductor
Parts packaging codeSC-70
package instructionSMALL OUTLINE, R-PDSO-G6
Contacts6
Manufacturer packaging code419B-02
Reach Compliance Codecompliant
ECCN codeEAR99
Factory Lead Time8 weeks
Samacsys DescriptionComplementary Bipolar Digital Transistor (BRT)
Other featuresBUILT-IN BIAS RESISTOR RATIO 1
Maximum collector current (IC)0.1 A
Collector-emitter maximum voltage50 V
ConfigurationSEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR
Minimum DC current gain (hFE)80
JESD-30 codeR-PDSO-G6
JESD-609 codee3
Humidity sensitivity level1
Number of components2
Number of terminals6
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
Polarity/channel typeNPN AND PNP
Maximum power dissipation(Abs)0.385 W
Certification statusNot Qualified
surface mountYES
Terminal surfaceTin (Sn)
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperature40
transistor applicationsSWITCHING
Transistor component materialsSILICON
MUN5313DW1,
NSBC144EPDXV6,
NSBC144EPDP6
Complementary Bias
Resistor Transistors
R1 = 47 kW, R2 = 47 kW
NPN and PNP Transistors with Monolithic
Bias Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base-emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
Features
(3)
R
1
Q
1
Q
2
R
2
R
1
(5)
(6)
www.onsemi.com
PIN CONNECTIONS
(2)
(1)
R
2
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
S and NSV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable*
These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(T
A
= 25°C both polarities Q
1
(PNP) & Q
2
(NPN), unless otherwise noted)
Rating
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current − Continuous
Input Forward Voltage
Input Reverse Voltage
Symbol
V
CBO
V
CEO
I
C
V
IN(fwd)
V
IN(rev)
Max
50
50
100
40
10
Unit
Vdc
Vdc
mAdc
(4)
MARKING DIAGRAMS
6
SOT−363
CASE 419B−02
1
13 MG
G
SOT−563
CASE 463A
1
13 MG
Vdc
SOT−963
CASE 527AD
1
13/K
M
G
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
Device
MUN5313DW1T1G,
SMUN5313DW1T1G*
SMUN5313DW1T3G*
NSBC144EPDXV6T1G
NSVBC144EPDXV6T1G*
NSBC144EPDXV6T5G
NSBC144EPDP6T5G
Package
SOT−363
SOT−363
SOT−563
SOT−563
SOT−963
Shipping
3,000/Tape & Reel
10,000/Tape & Reel
4,000/Tape & Reel
8,000/Tape & Reel
8,000/Tape & Reel
= Specific Device Code
= Date Code*
= Pb-Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2016
1
June, 2017 − Rev. 4
Publication Order Number:
DTC144EP/D
K
Vdc
M

MUN5313DW1T1G Related Products

MUN5313DW1T1G NSBC144EPDXV6T1G NSVBC144EPDXV6T1G NSBC144EPDXV6T5G NSVB144EPDXV6T1G
Description Bipolar Transistors - Pre-Biased SS BR XSTR DUAL 50V Bipolar Transistors - Pre-Biased 100mA Complementary 50V Dual NPN & PNP Bipolar Transistors - Pre-Biased SS SOT563 RSTR XSTR TR Bipolar Transistors - Pre-Biased 100mA Complementary 50V Dual NPN & PNP Bipolar Transistors - Pre-Biased SS SOT563 RSTR XSTR TR
Brand Name ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor -
Is it lead-free? Lead free Lead free Lead free Lead free -
Maker ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor -
package instruction SMALL OUTLINE, R-PDSO-G6 SMALL OUTLINE, R-PDSO-F6 - SMALL OUTLINE, R-PDSO-F6 -
Contacts 6 6 - 6 -
Manufacturer packaging code 419B-02 463A-01 463A-01 463A-01 -
Reach Compliance Code compliant compliant compliant compliant -
ECCN code EAR99 EAR99 - EAR99 -
Factory Lead Time 8 weeks 17 weeks 17 weeks 1 week -
Other features BUILT-IN BIAS RESISTOR RATIO 1 BUILT IN BIAS RESISTOR RATIO IS 1 BUILT IN BIAS RESISTANCE RATIO IS 1 BUILT IN BIAS RESISTOR RATIO IS 1 -
Maximum collector current (IC) 0.1 A 0.1 A 0.1 A 0.1 A -
Collector-emitter maximum voltage 50 V 50 V 50 V 50 V -
Configuration SEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR SEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR SEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR SEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR -
Minimum DC current gain (hFE) 80 80 80 80 -
JESD-30 code R-PDSO-G6 R-PDSO-F6 R-PDSO-F6 R-PDSO-F6 -
JESD-609 code e3 e3 e3 e3 -
Humidity sensitivity level 1 1 1 1 -
Number of components 2 2 2 2 -
Number of terminals 6 6 6 6 -
Maximum operating temperature 150 °C 150 °C 150 °C 150 °C -
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY -
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR -
Package form SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE -
Peak Reflow Temperature (Celsius) 260 260 NOT SPECIFIED 260 -
Polarity/channel type NPN AND PNP NPN AND PNP NPN AND PNP NPN AND PNP -
Maximum power dissipation(Abs) 0.385 W 0.5 W - 0.5 W -
Certification status Not Qualified Not Qualified - Not Qualified -
surface mount YES YES YES YES -
Terminal surface Tin (Sn) Tin (Sn) Tin (Sn) Tin (Sn) -
Terminal form GULL WING FLAT FLAT FLAT -
Terminal location DUAL DUAL DUAL DUAL -
Maximum time at peak reflow temperature 40 40 NOT SPECIFIED 40 -
transistor applications SWITCHING SWITCHING - SWITCHING -
Transistor component materials SILICON SILICON SILICON SILICON -
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