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SY10EL16VBZG

Description
Buffers & Line Drivers 5V/3.3V Enhanced Differential Receiver
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size140KB,13 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
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SY10EL16VBZG Overview

Buffers & Line Drivers 5V/3.3V Enhanced Differential Receiver

SY10EL16VBZG Parametric

Parameter NameAttribute value
MakerMicrochip
package instruction0.150 INCH, LEAD FREE, SOIC-8
Reach Compliance Codeunknown
ECCN codeEAR99
Differential outputNO
Input propertiesDIFFERENTIAL
Interface integrated circuit typeLINE RECEIVER
Interface standardsGENERAL PURPOSE
JESD-30 codeR-PDSO-G8
JESD-609 codee4
length4.93 mm
Nominal negative supply voltage-3.3 V
Number of functions1
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Certification statusNot Qualified
Maximum receive delay0.65 ns
Number of receiver bits1
Maximum seat height1.73 mm
surface mountYES
technologyECL
Temperature levelINDUSTRIAL
Terminal surfaceNICKEL PALLADIUM GOLD
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
width3.94 mm
Micrel, Inc.
ENHANCED
DIFFERENTIAL
RECEIVER
DESCRIPTION
SY10EL16VA-VF
SY100EL16VA-VF
SY10EL16VA-VF
SY100EL16VA-VF
FEATURES
s
3.3V and 5V power supply options
s
250ps propagation delay
s
Very high voltage gain vs. standard EL16 or EL16V
s
Ideal for Pulse Amplifier and Limiting Amplifier
applications
s
Data synchronous Enable/Disable (/EN) on Q
HG
and
/Q
HG
provides for complete glitchless gating of the
outputs
s
Ideal for gating timing signals
s
Complete solution for high quality, high frequency
crystal oscillator applications
s
Internal 75k
input pull-down resistors
s
Available in both 8- and 16-pin SOIC package; 8- and
10-pin (3mm) MSOP and in DIE form
PIN NAMES
Pin
D
Q
Q
HG
V
BB
/EN
Data Inputs
Data Outputs
Data Outputs w/High Gain
Reference Voltage Output
Enable Input
Function
TRUTH TABLE
/EN
0
1
Data
Logic Low
QHG Output
The SY10/100EL16VA-VF are differential receivers.
The devices are equivalent to SY10/100EL16 or SY10/
100EL16V with enhanced capabilities. The Q
HG
, /Q
HG
outputs have a DC gain several times larger than the DC
gain of the Q output.
The SY10/100EL16VA have an identical pinout to the
SY10/100EL16 or SY10/100EL16V. It provides a V
BB
output for either single-ended application or as a DC
bias for AC coupling to the device.
The SY10/100EL16VB are very similar to the SY10/
100EL16VA. The /Q output is provided for feedback
purposes.
The SY10/100EL16VC provides an /EN input which is
synchronized with the data input (D) signal in a way that
provides glitchless gating of the Q
HG
and /Q
HG
outputs. When
the /EN signal is LOW, the input is passed to the outputs and
the data output equals the data input. When the data input is
HIGH and the /EN goes HIGH, it will force the Q
HG
LOW and
the /Q
HG
HIGH on the next negative transition of the data
input. If the data input is LOW when the /EN goes HIGH, the
next data transition to a HIGH is ignored and Q
HG
remains
LOW and /Q
HG
remains HIGH. The next positive transition of
the data input is not passed on to the data outputs under these
conditions. The Q
HG
and /Q
HG
outputs remain in their dis-
abled state as long as the /EN input is held HIGH. The /EN
input has no influence on the /Q output and the data input is
passed on (inverted) to this output whether /EN is HIGH or
LOW. This configuration is ideal for crystal oscillator applica-
tions, where the oscillator can be free running and gated on
and off synchronously without adding extra counts to the
output.
The SY10/100EL16VD provides the flexibility of all the
combinations in DIE form, in 16-pin 150mil SOIC package or
in 10-pin MSOP package. The 16-pin SOIC and 10-pin MSOP
packages are ideal for prototyping DIE applications.
The SY10/100EL16VE are similar to the SY10/100EL16VB
where the Q, /Q output is made available differently. In this
package option, V
BB
is no longer provided.
The SY10/100EL16VF are similar to the SY10/100EL16VC,
offering the D, /D inputs rather than the V
BB
output.
M9999-052108
hbwhelp@micrel.com or (408) 955-1690
Rev.: Q
Amendment: /0
1
Issue Date: May 2008

SY10EL16VBZG Related Products

SY10EL16VBZG SY10EL16VBZG-TR SY10EL16VCZG-TR SY10EL16VAZG SY100EL16VDKG
Description Buffers & Line Drivers 5V/3.3V Enhanced Differential Receiver Buffers & Line Drivers Buffers & Line Drivers Buffers & Line Drivers 5V/3.3V Enhanced Differential Receiver Buffers & Line Drivers 5V/3.3V Enhanced Differential Receiver
Maker Microchip Microchip Microchip Microchip Microchip
package instruction 0.150 INCH, LEAD FREE, SOIC-8 SOP, SOP, 0.150 INCH, LEAD FREE, SOIC-8 TSSOP,
Reach Compliance Code unknown compliant compliant unknown compliant
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99
Differential output NO NO NO NO -
Input properties DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL -
Interface integrated circuit type LINE RECEIVER LINE RECEIVER LINE RECEIVER LINE RECEIVER -
Interface standards GENERAL PURPOSE GENERAL PURPOSE GENERAL PURPOSE GENERAL PURPOSE -
JESD-30 code R-PDSO-G8 R-PDSO-G8 R-PDSO-G16 R-PDSO-G8 -
JESD-609 code e4 e4 e4 e4 -
length 4.93 mm 4.93 mm 9.93 mm 4.93 mm -
Nominal negative supply voltage -3.3 V -3.3 V -3.3 V -3.3 V -
Number of functions 1 1 1 1 -
Number of terminals 8 8 16 8 -
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C -
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY -
encapsulated code SOP SOP SOP SOP -
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR -
Package form SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE -
Certification status Not Qualified Not Qualified Not Qualified Not Qualified -
Maximum receive delay 0.65 ns 0.65 ns 0.65 ns 0.65 ns -
Number of receiver bits 1 1 1 1 -
Maximum seat height 1.73 mm 1.73 mm 1.73 mm 1.73 mm -
surface mount YES YES YES YES -
technology ECL ECL ECL ECL -
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL -
Terminal surface NICKEL PALLADIUM GOLD Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) NICKEL PALLADIUM GOLD -
Terminal form GULL WING GULL WING GULL WING GULL WING -
Terminal pitch 1.27 mm 1.27 mm 1.27 mm 1.27 mm -
Terminal location DUAL DUAL DUAL DUAL -
width 3.94 mm 3.94 mm 3.94 mm 3.94 mm -
Is it Rohs certified? - conform to conform to conform to conform to
Humidity sensitivity level - 1 1 3 -
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