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P1102SALRP

Description
Sidacs 90V 50A DO214 2L SIDACtor Bi
CategoryAnalog mixed-signal IC    Trigger device   
File Size1MB,5 Pages
ManufacturerLittelfuse
Websitehttp://www.littelfuse.com
Environmental Compliance
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P1102SALRP Overview

Sidacs 90V 50A DO214 2L SIDACtor Bi

P1102SALRP Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerLittelfuse
Parts packaging codeDO-214AA
package instructionHALOGEN FREE AND ROHS COMPLIANT, PLASTIC PACKAGE-2
Contacts2
Reach Compliance Codenot_compliant
Other featuresUL RECOGNIZED
Maximum breakover voltage130 V
ConfigurationSERIES CONNECTED, 2 ELEMENTS
Maximum off-state DC voltage90 V
Maximum holding current120 mA
JEDEC-95 codeDO-214AA
JESD-30 codeR-PDSO-C2
JESD-609 codee3
Humidity sensitivity level1
On-state non-repetitive peak current20 A
Number of components2
Number of terminals2
Maximum operating temperature150 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
surface mountYES
Terminal surfaceMatte Tin (Sn)
Terminal formC BEND
Terminal locationDUAL
Maximum time at peak reflow temperature40
Trigger device typeSILICON SURGE PROTECTOR
SIDACtor
®
Protection Thyristors
Broadband Optimized
TM
Protection
MC Multiport Series - MS-013
Description
RoHS
Pb
e3
The MC Multiport Series MS-013 are low capacitance
SIDACtor
®
thyristors designed to protect broadband
equipment from damaging overvoltage transients.
The series provides a dual port surface mount solution
that enables equipment to comply with various global
regulatory standards while limiting the impact to
broadband signals.
Features and Benefits
• Low voltage overshoot
Agency Approvals
Agency
Agency File Number
E133083
• Low on-state voltage
• Does not degrade surge
capability after multiple
surge events within
limit.
• Fails short circuit when
surged in excess of
ratings
6
5
4
Protectors, for
applications that
demand greater signal
integrity
• Replaces four discrete
components
• Pb-free E3 means 2nd
level interconnect is
Pb-free and the terminal
finish material is tin(Sn)
(IPC/JEDEC J-STD-
609A.01)
Pinout Designation
1
2
3
• Two-pair protection
• 40% lower capacitance
than our Baseband
Applicable Global Standards
• TIA-968-A
Schematic Symbol
(T
1
) 1
(G
1
) 2
(R
1
) 3
6 (T
2
)
5 (G
2
)
4 (R
2
)
• GR 1089 Intra-building
• IEC 61000-4-5 2nd
edition
• YD/T 1082
• YD/T 993
• YD/T 950
• TIA-968-B
• ITU K.20/21/45 Enhanced
Level
• ITU K.20/21/45 Basic
Level
• GR 1089 Inter-building
Electrical Characteristics
V
S
V
DRM
V
S
V
DRM
@l
DRM
=5µA @100V/µs @l
DRM
=5µA @100V/µs
V
6
25
58
65
75
90
120
V
25
40
77
88
98
130
160
V
12
50
116
130
150
180
240
V
50
80
154
176
196
260
320
Pins 1-2, 3-2, 4-5, 6-5
P0084UCMCLxx
P0304UCMCLxx
P0644UCMCLxx
P0724UCMCLxx
P0904UCMCLxx
P1104UCMCLxx
P1304UCMCLxx
P0084UCMC
P0304UCMC
P0644UCMC
P0724UCMC
P0904UCMC
P1104UCMC
P1304UCMC
Pins 1-3, 4-6
I
H
I
S
I
T
V
T
@I
T
= 2.2
Amps
V max
Part Number
Marking
Capacitance
mA min mA max A max
50
50
150
150
150
150
150
800
800
800
800
800
800
800
Notes:
- Absolute maximum ratings measured at T
A
= 25ºC (unless otherwise noted).
- Components are bi-directional.
-
XX
Part Number Suffix: ‘TP’ (Tube Pack) or ‘RP’ (Reel Pack).
2.2
8
2.2
8
2.2
8
See
2.2
8
Capacitance
Values Table
2.2
8
2.2
8
2.2
8
Table continues on next page.
© 2017 Littelfuse, Inc.
Specifications are subject to change without notice.
Revised: 02/23/17

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