Data Sheet
FEATURES
1.5 pF off capacitance
0.5 pC charge injection
33 V supply range
120 Ω on resistance
Fully specified at ±15 V/+12 V
3 V logic-compatible inputs
Rail-to-rail operation
Break-before-make switching action
16-lead TSSOP, 20-lead TSSOP, and 4 mm × 4 mm LFCSP
Typical power consumption (<0.03 μW)
Low Capacitance, Triple/Quad SPDT
±15 V/+12 V
iCMOS
Switches
ADG1233/ADG1234
FUNCTIONAL BLOCK DIAGRAMS
ADG1233
S1A
D1
S1B
S3B
D3
S3A
S2B
D2
S2A
LOGIC
IN1 IN2 IN3 EN
SWITCHES SHOWN FOR A LOGIC 1 INPUT
Audio and video routing
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Communication systems
Figure 1.
ADG1234
S1A
D1
S1B
S4A
D4
S4B
S2B
D2
S2A
S3B
D3
S3A
LOGIC
IN1 IN2 IN3 IN4 EN
SWITCHES SHOWN FOR A LOGIC 1 INPUT
Figure 2.
GENERAL DESCRIPTION
The
ADG1233
and
ADG1234
are monolithic
iCMOS®
analog
switches comprising three independently selectable single-pole,
double throw SPDT switches and four independently selectable
SPDT switches, respectively.
All channels exhibit break-before-make switching action
preventing momentary shorting when switching channels. An
EN input on the
ADG1233
and
ADG1234
enables or disables
the device. When disabled, all channels are switched off.
The
iCMOS
(industrial-CMOS) modular manufacturing process
combines a high voltage complementary metal-oxide semi-
conductor (CMOS) and bipolar technologies. It enables the
development of a wide range of high performance analog ICs
capable of 33 V operation in a footprint that no other generation of
high voltage devices has been able to achieve.
Unlike analog ICs using conventional CMOS processes,
iCMOS
components can tolerate high supply voltages while providing
increased performance, dramatically lowered power consumption,
and reduced package size.
The ultralow capacitance and charge injection of these multiplexers
make them ideal solutions for data acquisition and sample-and-
hold applications, where low glitch and fast settling are required.
Fast switching speed coupled with high signal bandwidth make the
devices suitable for video signal switching.
iCMOS
construction
ensures ultralow power dissipation, making the devices ideally
suited for portable and battery-powered instruments.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
1.5 pF off capacitance (±15 V supply).
0.5 pC charge injection.
3 V logic-compatible digital input, VIH = 2.0 V, VIL = 0.8 V.
16-lead TSSOP, 20-lead TSSOP, and 4 mm × 4 mm LFCSP.
Rev. D
Document Feedback
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2006–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
05743-038
05743-001
APPLICATIONS
ADG1233/ADG1234
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagrams ............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Dual Supply ................................................................................... 3
Single Supply ................................................................................. 5
Data Sheet
Absolute Maximum Ratings ............................................................7
ESD Caution...................................................................................7
Pin Configurations and Function Descriptions ............................8
Terminology .................................................................................... 10
Typical Performance Characteristics ........................................... 11
Test Circuits..................................................................................... 14
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 17
REVISION HISTORY
8/2016—Rev. C to Rev. D
Changes to Analog Inputs Parameter and Digital Inputs
Parameter, Table 3............................................................................. 7
Updated Outline Dimensions ....................................................... 17
3/2016—Rev. B to Rev. C
Changes to Figure 5 and Figure 6 ................................................... 9
Updated Outline Dimensions ....................................................... 17
Changes to Ordering Guide .......................................................... 17
2/2009—Rev. A to Rev. B
Change to I
DD
Parameter, Table 1 ................................................... 4
Change to I
DD
Parameter, Table 2 ................................................... 6
Updated Outline Dimensions ....................................................... 16
8/2006—Rev. 0 to Rev. A
Updated Format ................................................................ \Universal
Changes to Table 1.......................................................................... 13
Changes to Table 2.......................................................................... 14
Changes to Figure 11.................................................................... 110
Changes to Figure 12.................................................................... 111
1/2006—Revision 0: Initial Version
Rev. D | Page 2 of 17
Data Sheet
SPECIFICATIONS
DUAL SUPPLY
V
DD
= +15 V ± 10%, V
SS
= −15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (R
ON
)
On Resistance Match Between
Channels (∆R
ON
)
On Resistance Flatness (R
FLAT (ON)
)
LEAKAGE CURRENTS
Source Off Leakage I
S
(Off )
Drain Off Leakage I
D
(Off )
+25°C
Y Version
1
−40°C to +85°C −40°C to +125°C
V
SS
to V
DD
120
190
3.5
6
20
60
±0.02
±0.1
±0.02
±0.1
±0.02
±0.2
230
260
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
µA typ
µA max
pF typ
ns typ
ns max
ns typ
ns min
ns typ
ns max
ns typ
ns max
pC typ
dB typ
dB typ
% typ
MHz typ
pF typ
pF max
pF typ
pF max
Rev. D | Page 3 of 17
ADG1233/ADG1234
Test Conditions/Comments
V
S
= ±10 V, I
S
= −1 mA; see Figure 24
V
DD
= +13.5 V, V
SS
= −13.5 V
V
S
= ±10 V, I
S
= −1 mA
10
72
12
79
V
S
= −5 V, 0 V, +5 V; I
S
= −1 mA
V
DD
= +16.5 V, V
SS
= −16.5 V
V
D
= ±10 V, V
S
= −10 V; see Figure 25
V
S
= 1 V/10 V, V
D
= 10 V/1 V;
see Figure 25
V
S
= V
D
= ±10 V; see Figure 26
±0.6
±1
±0.6
±0.6
±1
±1
2.0
0.8
Channel On Leakage I
D,
I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
2
t
TRANSITION
t
BBM
t
ON
(EN)
t
OFF
(EN)
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Total Harmonic Distortion, THD + N
−3 dB Bandwidth
C
S
(Off )
C
D
(Off )
±0.005
±0.1
3
110
130
25
120
140
40
45
0.5
−80
−85
0.14
900
1.5
1.7
1.6
1.8
V
IN
= V
INL
or V
INH
150
170
10
170
55
195
60
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 10 V; see Figure 27
R
L
= 300 Ω, C
L
= 35 pF
V
S1
= V
S2
= +10 V; see Figure 28
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 10 V; see Figure 29
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 10 V; see Figure 29
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF;
see Figure 30
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see
Figure 31
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz;
see Figure 33
R
L
= 10 kΩ, 5 V rms, f = 20 Hz to
20 kHz; see Figure 34
R
L
= 50 Ω, C
L
= 5 pF; see Figure 32
f = 1 MHz; V
S
= 0 V
f = 1 MHz; V
S
= 0 V
f = 1 MHz; V
S
= 0 V
f = 1 MHz; V
S
= 0 V
ADG1233/ADG1234
Parameter
C
D
, C
S
(On)
POWER REQUIREMENTS
I
DD
I
DD
I
SS
I
SS
V
DD
/V
SS
1
2
Data Sheet
+25°C
3.5
4
0.002
1.0
260
475
0.002
1.0
0.002
1.0
±5/±16.5
Y Version
1
−40°C to +85°C −40°C to +125°C
Unit
pF typ
pF max
µA typ
µA max
µA typ
µA max
µA typ
µA max
µA typ
µA max
V min/max
Test Conditions/Comments
f = 1 MHz; V
S
= 0 V
f = 1 MHz; V
S
= 0 V
V
DD
= +16.5 V, V
SS
= −16.5 V
Digital inputs = 0 V or V
DD
Digital inputs = 5 V
Digital inputs = 0 V or V
DD
Digital inputs = 5 V
GND = 0 V
Temperature range for the Y version: −40°C to +125°C.
Guaranteed by design, not subject to production test.
Rev. D | Page 4 of 17
Data Sheet
SINGLE SUPPLY
V
DD
= 12 V ± 10%, V
SS
= 0 V, GND = 0 V, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (R
ON
)
+25°C
Y Version
1
−40°C to +85°C −40°C to +125°C
0 to V
DD
300
475
5
16
60
±0.02
±0.1
±0.02
±0.1
±0.02
±0.2
±0.6
±1
567
625
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
µA typ
µA max
pF typ
ns typ
200
230
10
t
ON
(EN)
t
OFF
(EN)
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
−3 dB Bandwidth
C
S
(Off )
C
D
(Off )
C
D
, C
S
(On)
150
195
45
60
−0.3
−80
−85
600
1.5
1.7
2
2.2
4
4.5
230
70
265
ns typ
75
pC typ
dB typ
dB typ
MHz typ
pF typ
pF max
pF typ
pF max
pF typ
pF max
ns typ
ns min
ns typ
ADG1233/ADG1234
Test Conditions/Comments
On Resistance Match Between
Channels (∆R
ON
)
On Resistance Flatness (R
FLAT (ON)
)
LEAKAGE CURRENTS
Source Off Leakage I
S
(Off )
V
S
= 0 V to 10 V, I
S
= −1 mA;
see Figure 24
V
DD
= 10.8 V, V
SS
= 0 V
V
S
= 0 V to 10 V, I
S
= −1 mA
26
27
V
S
= 3 V, 6 V, 9 V, I
S
= −1 mA
V
DD
= 13.2 V
V
S
= 1 V/10 V, V
D
= 10 V/1 V;
see Figure 25
V
S
= 1 V/10 V, V
D
= 10 V/1 V;
see Figure 25
V
S
= V
D
= 1 V or 10 V, see Figure 26
Drain Off Leakage I
D
(Off )
±0.6
±0.6
±1
±1
2.0
0.8
Channel On Leakage I
D,
I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
2
t
TRANSITION
t
BBM
±0.001
±0.1
2
135
170
45
V
IN
= V
INL
or V
INH
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 8 V; see Figure 27
R
L
= 300 Ω, C
L
= 35 pF
V
S1
= V
S2
= 8 V; see Figure 28
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 8 V; see Figure 29
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 8 V; see Figure 29
V
S
= 6 V, R
S
= 0 Ω, C
L
= 1 nF; see
Figure 30
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz;
see Figure 31
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz;
see Figure 33
R
L
= 50 Ω, C
L
= 5 pF; see Figure 32
f = 1 MHz; V
S
= 6 V
f = 1 MHz; V
S
= 6 V
f = 1 MHz; V
S
= 6 V
f = 1 MHz; V
S
= 6 V
f = 1 MHz; V
S
= 6 V
f = 1 MHz; V
S
= 6 V
Rev. D | Page 5 of 17