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IDT7201LA120J

Description
1K X 9 OTHER FIFO, 15 ns, PDSO28
Categorystorage   
File Size94KB,13 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
Download Datasheet Parametric View All

IDT7201LA120J Overview

1K X 9 OTHER FIFO, 15 ns, PDSO28

IDT7201LA120J Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals28
Maximum operating temperature70 Cel
Minimum operating temperature0.0 Cel
Maximum supply/operating voltage5.5 V
Minimum supply/operating voltage4.5 V
Rated supply voltage5 V
maximum access time15 ns
Processing package descriptionSOIC-28
stateDISCONTINUED
CraftsmanshipCMOS
packaging shapeRectangle
Package SizeSMALL OUTLINE
surface mountYes
Terminal formGULL WING
Terminal spacing1.27 mm
terminal coatingtin lead
Terminal locationpair
Packaging MaterialsPlastic/Epoxy
Temperature levelCOMMERCIAL
memory width9
organize1K × 9
storage density9216 deg
operating modeASYNCHRONOUS
Number of digits1024 words
Number of digits1K
cycle25 ns
Memory IC typeOther first in first out
CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9, 1,024 x 9
Integrated Device Technology, Inc.
IDT7200L
IDT7201LA
IDT7202LA
FEATURES:
First-In/First-Out dual-port memory
256 x 9 organization (IDT7200)
512 x 9 organization (IDT7201)
1,024 x 9 organization (IDT7202)
Low power consumption
— Active: 770mW (max.)
—Power-down: 2.75mW (max.)
Ultra high speed—12ns access time
Asynchronous and simultaneous read and write
Fully expandable by both word depth and/or bit width
Pin and functionally compatible with 720X family
Status Flags: Empty, Half-Full, Full
Auto-retransmit capability
High-performance CEMOS™ technology
Military product compliant to MIL-STD-883, Class B
Standard Military Drawing #5962-87531, 5962-89666,
5962-89863 and 5962-89536 are listed on this function
Industrial temperature range (–40°C to +85°C) is
available (plastic packages only)
DESCRIPTION:
The IDT7200/7201/7202 are dual-port memories that load
and empty data on a first-in/first-out basis. The devices use
Full and Empty flags to prevent data overflow and underflow
and expansion logic to allow for unlimited expansion capability
in both word size and depth.
The reads and writes are internally sequential through the
use of ring pointers, with no address information required to
load and unload data. Data is toggled in and out of the devices
through the use of the Write (
W
) and Read (
R
) pins.
The devices utilize a 9-bit wide data array to allow for
control and parity bits at the user’s option. This feature is
especially useful in data communications applications where
it is necessary to use a parity bit for transmission/reception
error checking. It also features a Retransmit (
RT
) capability
that allows for reset of the read pointer to its initial position
when
RT
is pulsed low to allow for retransmission from the
beginning of data. A Half-Full Flag is available in the single
device mode and width expansion modes.
These FIFOs are fabricated using IDT’s high-speed CMOS
technology. They are designed for those applications requir-
ing asynchronous and simultaneous read/writes in multiproc-
essing and rate buffer applications. Military grade product is
manufactured in compliance with the latest revision of MIL-
STD-883, Class B.
FUNCTIONAL BLOCK DIAGRAM
DATA INPUTS
(D
0
–D
8
)
W
WRITE
CONTROL
WRITE
POINTER
RAM
ARRAY
256 x 9
512 x 9
1,024 x 9
READ
POINTER
R
READ
CONTROL
THREE-
STATE
BUFFERS
DATA OUTPUTS
(Q
0
–Q
8
)
RS
RESET
LOGIC
FLAG
LOGIC
EF
FF
XO
/
HF
FL
/
RT
XI
The IDT logo is a trademark of Integrated Device Technology, Inc.
EXPANSION
LOGIC
2679 drw 01
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
©1997
Integrated Device Technology, Inc.
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
SEPTEMBER 1997
DSC-2679/7
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