CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
2. Due to the SCR structure inherent in the CMOS process used to fabricate these devices, connecting any terminal to voltages greater than (V+
+0.3V) or less than (GND - 0.3V) may cause destructive device latchup. For these reasons, it is recommended that no inputs from external
sources not operating from the same power supply be applied to the device before its supply is established, and that in multiple supply systems,
the supply to the ICL7665S be turned on first. If this is not possible, current into inputs and/or outputs must be limited to
±0.5mA
and voltages
must not exceed those defined above.
Electrical Specifications
PARAMETER
Operating Supply Voltage
The specifications below are applicable to both the ICL7665S and ICL7665SA. V+ = 5V, T
A
= 25°C,
Test Circuit Figure 7. Unless Otherwise Specified
SYMBOL
V+
ICL7665S
TEST CONDITIONS
T
A
= 25°C
0°C
≤
T
A
≤
70°C
-25°C
≤
T
A
≤
85°C
ICL7665SA
0°C
≤
T
A
≤
70°C
-25°C
≤
T
A
≤
85°C
MIN
1.6
1.8
1.8
1.8
1.8
TYP
-
-
-
-
-
MAX
16
16
16
16
16
UNITS
V
V
V
V
V
Supply Current
I+
GND
≤
V
SET1
, V
SET2
≤
V+, All Outputs Open Circuit
0°C
≤
T
A
≤
70°C
V+ = 2V
V+ = 9V
V+ = 15V
-40°C
≤
T
A
≤
85°C
V+ = 2V
V+ = 9V
V+ = 15V
-
-
-
-
-
-
1.20
1.20
ICL7665SA
1.275
1.275
ICL7665S
ICL7665SA
R
OUT1
, R
OUT2
, R
HYST1
, R
2HYST2
= 1MΩ,
2V
≤
V+
≤
10V
-
-
-
2.5
2.6
2.9
2.5
2.6
2.9
1.30
1.30
1.30
1.30
200
100
0.03
10
10
10
10
10
10
1.40
1.40
1.325
1.325
-
-
-
µA
µA
µA
µA
µA
µA
V
V
V
V
ppm
ppm
%/V
Input Trip Voltage
V
SET1
V
SET2
V
SET1
V
SET2
ICL7665S
Temperature Coefficient of
V
SET
Supply Voltage Sensitivity of
V
SET1
, V
SET2
∆V
SET
∆T
∆V
SET
∆V
S
3
FN3182.8
April 5, 2006
ICL7665S
Electrical Specifications
PARAMETER
Output Leakage Currents of
OUT and HYST
The specifications below are applicable to both the ICL7665S and ICL7665SA. V+ = 5V, T
A
= 25°C,
Test Circuit Figure 7. Unless Otherwise Specified
(Continued)
SYMBOL
I
OLK
I
HLK
I
OLK
I
HLK
Output Saturation Voltages
V
OUT1
V
SET1
= 2V,
I
OUT1
= 2mA
V+ = 2V
V+ = 5V
V+ = 15V
Output Saturation Voltages
V
HYST1
V
SET1
= 2V,
I
HYST1
= -0.5mA
V+ = 2V
V+ = 5V
V+ = 15V
Output Saturation Voltages
V
OUT2
V
SET2
= 0V,
I
OUT2
= 2mA
V+ = 2V
V+ = 5V
V+ = 15V
Output Saturation Voltages
V
HYST2
V
SET2
= 2V
V+ = 2V, I
HYST2
= -0.2mA
V+ = 5V, I
HYST2
= -0.5mA
V+ = 15V, I
HYST2
= -0.5mA
V
SET
Input Leakage Current
∆
Input for Complete Output
Change
I
SET
∆V
SET
GND
≤
V
SET
≤
V+
R
OUT
= 4.7kΩ,
R
HYST
= 20kΩ,
V
OUT
LO = 1% V+,
V
OUT
HI = 99% V+
R
OUT
, R
HYST
= 1mW
R
OUT
, R
HYST
= 1mW
ICL7665S
ICL7665SA
ICL7665S
ICL7665SA
V+ = 15V
TEST CONDITIONS
V
SET
= 0V or V
SET
≥
2V
MIN
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
TYP
10
-10
-
-
0.2
0.1
0.06
-0.15
-0.05
-0.02
0.2
0.15
0.11
-0.25
-0.43
-0.35
0.01
1.0
0.1
MAX
200
-100
2000
-500
0.5
0.3
0.2
-0.30
-0.15
-0.10
0.5
0.3
0.25
-0.8
-1.0
-0.8
10
-
-
UNITS
nA
nA
nA
nA
V
V
V
V
V
V
V
V
V
V
V
V
nA
mV
mV
Difference in Trip Voltages
Output/Hysteresis
Difference
NOTES:
V
SET1
-
V
SET2
-
-
-
±5
±1
±0.1
±50
-
-
mV
mV
mV
3. Derate above 25°C ambient temperature at 4mW/°C.
4. All significant improvements over the industry standard ICL7665 are highlighted.
4
FN3182.8
April 5, 2006
ICL7665S
AC Electrical Specifications
PARAMETER
OUTPUT DELAY TIMES
Input Going HI
t
SO1D
t
SH1D
t
SO2D
t
SH2D
Input Going LO
t
SO1D
t
SH1D
t
SO2D
t
SH2D
Output Rise Times
t
O1R
t
O2R
t
H1R
t
H2R
Output Fall Times
t
O1F
t
O2F
t
H1F
t
H2F
V
SET
Switched between 1.0V to 1.6V
R
OUT
= 4.7kΩ, C
L
= 12pF
R
HYST
= 20kΩ, C
L
= 12pF
V
SET
Switched between 1.0V to 1.6V
R
OUT
= 4.7kΩ, C
L
= 12pF
R
HYST
= 20kΩ, C
L
= 12pF
V
SET
Switched between 1.6V to 1.0V
R
OUT
= 4.7kΩ, C
L
= 12pF
R
HYST
= 20kΩ, C
L
= 12pF
V
SET
Switched between 1.0V to 1.6V
R
OUT
= 4.7kΩ, C
L
= 12pF
R
HYST
= 20kΩ, C
L
= 12pF
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
85
90
55
55
75
80
60
60
0.6
0.8
7.5
0.7
0.6
0.7
4.0
1.8
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Functional Block Diagram
V+
SET1
-
+
REF
+
-
OUT2
OUT1
GND
HYST2
HYST1
SET2
CONDITIONS (Note 5)
V
SET1
> 1.3V, OUT1 Switch ON, HYST1 Switch ON
V
SET1
< 1.3V, OUT1 Switch OFF, HYST1 Switch OFF
V
SET2
> 1.3V, OUT2 Switch OFF, HYST2 Switch ON
V
SET2
< 1.3V, OUT2 Switch ON, HYST2 Switch OFF
NOTE:
5. See Electrical Specifications for exact thresholds.
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