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HY62SF16403ASLM-I

Description
256Kx16bit full CMOS SRAM
File Size121KB，10 Pages
ManufacturerSK Hynix
Websitehttp://www.hynix.com/eng/
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HY62SF16403ASLM-I Overview

256Kx16bit full CMOS SRAM

HY62SF16403ASLM-I Preview

HY62SF16403A Series
256Kx16bit full CMOS SRAM
Document Title
256K x16 bit 1.7 ~ 2.3V Super Low Power FCMOS Slow SRAM
Revision History
Revision No
08
History
Icc1 Value change.
30mA -> 20mA
Marking Information add
tBLZ / tOLZ value is changed
Output Load is redefined
Isb, Isb1, Vdr, Iccdr are redefined
Changed Logo
Changed Isb1 values
Draft Date
Nov.22.2000
Remark
Final
09
Dec.18.2000
Final
10
11
Mar.23.2001
Jun.07.2001
Final
Final
This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility
for use of circuits described. No patent licenses are implied.
Rev.11 / Jun.01
Hynix Semiconductor
HY62SF16403A Series
DESCRIPTION
The HY62SF16403A is a high speed, super low
power and 4Mbit full CMOS SRAM organized as
256K words by 16bits. The HY62SF16403A uses
high performance full CMOS process technology
and is designed for high speed and low power
circuit technology. It is particularly well-suited for
the high density low power system application.
This device has a data retention mode that
guarantees data to remain valid at a minimum
power supply voltage of 1.2V.
FEATURES
•
Fully static operation and Tri-state output
•
TTL compatible inputs and outputs
•
Battery backup
-. 1.2V(min) data retention
•
Standard pin configuration
-. 48-ball uBGA
Product No.
Voltage
(V)
Speed (ns)
Operation
Current/Icc(mA)
3
3
HY62SF16403A
1.7~2.3
85/100/120
HY62SF16403A-I 1.7~2.3
85/100/120
Note 1. Blank : Commercial, I : Industrial
2. Current value is max.
Standby
Current(uA)
LL
SL
10
3
10
3
Temperature
(°C)
0~70
-40~85(I)
PIN CONNECTION
1
2
/OE
/UB
3
A0
A3
4
A1
A4
A6
A7
A16
A15
A13
A10
5
A2
/CS
IO2
IO4
IO5
IO6
6
NC
IO1
IO3
Vcc
Vss
IO7
A17
ADD INPUT
BUFFER
PRE DECODER
A0
BLOCK DIAGRAM
ROW
DECODER
A
B
C
D
E
F
G
H
/LB
IO9
I/O1
SENSE AMP
COLUMN
DECODER
IO10 IO11 A5
Vss
Vcc
IO12 A17
IO13 NC
I/O8
DATA I/O
BUFFER
MEMORY ARRAY
256K x 16
WRITE DRIVER
I/O9
BLOCK
DECODER
IO15 IO14 A14
IO16 NC
NC
A8
A12
A9
I/O16
/WE IO8
A11
NC
/CS
/OE
/LB
/UB
/WE
uBGA
PIN DESCRIPTION
Pin Name
/CS
/WE
/OE
/LB
/UB
Pin Function
Chip Select
Write Enable
Output Enable
Lower Byte Control(I/O1~I/O8)
Upper Byte Control(I/O9~I/O16)
Pin Name
I/O1~I/O16
A0~A17
Vcc
Vss
NC
Pin Function
Data Inputs/Outputs
Address Inputs
Power(1.7~2.3)
Ground
No Connection
Rev.11 / Jun.01
2
HY62SF16403A Series
ORDERING INFORMATION
Part No.
HY62SF16403ALLM
HY62SF16403ASLM
HY62SF16403ALLM-I
HY62SF16403ASLM-I
Speed
85/100/120
85/100/120
85/100/120
85/100/120
Power
LL-part
SL-part
LL-part
SL-part
Temp
.
Package
uBGA
uBGA
uBGA
uBGA
I
I
Note 1. Blank : Commercial, I : Industrial
ABSOLUTE MAXIMUM RATINGS (1)
Symbol
V
IN,
V
OUT
Vcc
T
A
T
STG
P
D
T
SOLDER
Parameter
Input/Output Voltage
Power Supply
Operating Temperature
Storage Temperature
Power Dissipation
Ball Soldering Temperature & Time
Rating
-0.3 to 2.6
-0.3 to 3.6
0 to 70
-40 to 85
-55 to 150
1.0
260
•
10
Unit
V
V
°C
°C
°C
W
°C•sec
Remark
HY62SF16403A
HY62SF16403A-I
Note
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is stress rating only and the functional operation of the device under these or
any other conditions above those indicated in the operation of this specification is not implied.
Exposure to the absolute maximum rating conditions for extended period may affect reliability.
TRUTH TABLE
/CS
H
X
L
L
/WE
X
X
H
H
/OE
X
X
H
L
/LB
X
H
L
X
L
H
L
L
H
L
/UB
X
H
X
L
H
L
L
H
L
L
Mode
Deselected
Output Disabled
Read
I/O Pin
I/O1~I/O8
I/O9~I/O16
High-Z
High-Z
D
OUT
High-Z
D
OUT
D
IN
High-Z
D
IN
High-Z
High-Z
High-Z
D
OUT
D
OUT
High-Z
D
IN
D
IN
Power
Standby
Active
Active
L
L
X
Write
Active
Note:
1. H=V
IH
, L=V
IL
, X=don't care (V
IL or
V
IH
)
2. /UB, /LB(Upper, Lower Byte enable)
These active LOW inputs allow individual bytes to be written or read.
When /LB is LOW, data is written or read to the lower byte, I/O 1 -I/O 8.
When /UB is LOW, data is written or read to the upper byte, I/O 9 -I/O 16.
Rev.11 / Jun.01
2
HY62SF16403A Series
RECOMMENDED DC OPERATING CONDITION
Symbol
Vcc
Vss
V
IH
V
IL
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Min.
1.7
0
1.4
-0.3
1.
Typ
1.8
0
-
-
Max.
2.3
0
Vcc+0.3
0.4
Unit
V
V
V
V
Note : 1. Undershoot : VIL = -1.5V for pulse width less than 30ns
2. Undershoot is sampled, not 100% tested.
DC ELECTRICAL CHARACTERISTICS
T
A
= 0°C to 70°C / -40°C to 85°C (I)
Sym
Parameter
I
LI
Input Leakage Current
I
LO
Icc
Output Leakage Current
Operating Power Supply Current
Test Condition
Vss < V
IN
< Vcc
Vss < V
OUT
< Vcc, /CS = V
IH
or
/
OE
=
V
IH
or /WE = V
IL
or
/
UB
=
V
IH ,
/LB = V
IH
/CS = V
IL
,
V
IN
= V
IH
or V
IL,
I
I/O =
0mA
/CS = V
IL,
V
IN
= V
IH
or V
IL,
Cycle Time = Min,
100% Duty, I
I/O =
0mA
/CS < 0.2V
,
V
IN
< 0.2V or V
IN
> Vcc-0.2V
,
Cycle Time = 1us,
100% Duty, I
I/O =
0mA
/CS = V
IH
or /UB, /LB = V
IH
V
IN
= V
IH
or V
IL
/CS > Vcc - 0.2V or
SL
/UB, /LB > Vcc - 0.2V
V
IN
> Vcc - 0.2V or
LL
V
IN
< Vss + 0.2V
I
OL
= 0.1mA
I
OH =
-0.1mA
Min
-1
-1
Typ
1.
-
-
Max
1
1
Unit
uA
uA
3
20
mA
mA
I
CC1
Average Operating Current
3
mA
I
SB
Standby Current
(TTL Input)
0.3
0.1
0.1
-
1.6
-
-
3
10
0.2
-
mA
uA
uA
V
V
I
SB1
V
OL
V
OH
Standby Current
(CMOS Input)
Output Low
Output High
Note
1. Typical values are at Vcc = 1.8V T
A
= 25°C
2. Typical values are not 100% tested
CAPACITANCE
(Temp = 25°C, f= 1.0MHz)
Symbol
Parameter
C
IN
Input Capacitance(Add, /CS,/LB,/UB, /WE, /OE)
C
OUT
Output Capacitance(I/O)
Note : These parameters are sampled and not 100% tested
Condition
V
IN
= 0V
V
I/O
= 0V
Max.
8
10
Unit
pF
pF
Rev.11 / Jun.01
3
HY62SF16403A Series
AC CHARACTERISTICS
T
A
= 0°C to 70°C / -40°C to 85°C (I), unless otherwise specified
85ns
#
Symbol
Parameter
Min. Max.
READ CYCLE
1
tRC
Read Cycle Time
85
-
2
tAA
Address Access Time
-
85
3
tACS
Chip Select Access Time
-
85
4
tOE
Output Enable to Output Valid
-
40
5
tBA
/LB, /UB Access Time
-
85
6
tCLZ
Chip Select to Output in Low Z
10
-
7
tOLZ
Output Enable to Output in Low Z
5
-
8
tBLZ
/LB, /UB Enable to Output in Low Z
10
-
9
tCHZ
Chip Deselection to Output in High Z
0
30
10 tOHZ
Out Disable to Output in High Z
0
30
11 tBHZ
/LB, /UB Disable to Output in High Z
0
30
12 tOH
Output Hold from Address Change
10
-
WRITE CYCLE
13 tWC
Write Cycle Time
85
-
14 tCW
Chip Selection to End of Write
70
-
15 tAW
Address Valid to End of Write
70
-
16 tBW
/LB, /UB Valid to End of Write
70
-
17 tAS
Address Set-up Time
0
-
18 tWP
Write Pulse Width
60
-
19 tWR
Write Recovery Time
0
-
20 tWHZ
Write to Output in High Z
0
25
21 tDW
Data to Write Time Overlap
35
-
22 tDH
Data Hold from Write Time
0
-
23 tOW
Output Active from End of Write
5
-
100ns
Min. Max.
100
-
-
-
-
10
5
10
0
0
0
15
100
80
80
80
0
70
0
0
40
0
10
-
100
100
50
100
-
-
-
30
30
30
-
-
-
-
-
-
-
-
30
-
-
-
120ns
Min
Max.
120
-
-
-
-
10
5
10
0
0
0
15
100
100
100
100
0
85
0
0
50
0
10
-
120
120
60
120
-
-
-
40
40
40
-
-
-
-
-
-
-
-
35
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
AC TEST CONDITIONS
T
A
= 0°C to 70°C / -40°C to 85°C (I), unless otherwise specified
Parameter
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Level
Output Load
tCLZ, tOLZ, tBLZ, tCHZ, tOHZ, tBHZ, tWHZ, tOW
Others
Value
0.4V to 1.6V
5ns
0.9V
CL = 5pF + 1TTL Load
CL = 30pF + 1TTL Load
AC TEST LOADS
V
TM
=1.8V
4091 Ohm
D
OUT
CL(1)
3273 Ohm
Note 1. Including jig and scope capacitance.
Rev.11 / Jun.01
4
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