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598BCA000107DG

Description
Programmable Oscillators PRGML XO 8 PIN 0.5PS RMS JITTER (NCNR)
CategoryPassive components   
File Size515KB,28 Pages
ManufacturerSilicon Laboratories
Environmental Compliance
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598BCA000107DG Overview

Programmable Oscillators PRGML XO 8 PIN 0.5PS RMS JITTER (NCNR)

598BCA000107DG Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerSilicon Laboratories
Product CategoryProgrammable Oscillators
RoHSDetails
Frequency107 MHz
Frequency Stability30 PPM
Supply Voltage - Min1.8 V
Supply Voltage - Max3.3 V
Output FormatLVDS
ProductXO
Termination StyleSMD/SMT
Package / Case7 mm x 5 mm
Minimum Operating Temperature- 40 C
Maximum Operating Temperature+ 85 C
Length7 mm
Width5 mm
PackagingTray
TypeLVDS Oscillators
Mounting StyleSMD/SMT
Factory Pack Quantity1
Unit Weight0.006562 oz
Si 5 9 8 / S i 5 9 9
10–810 M H
Z
I
2
C P
ROGRAMMABLE
XO/VCXO
Features
I
2
C programmable output
frequencies from 10 to 810 MHz
0.5 ps RMS phase jitter
Superior power supply rejection:
0.3–0.4 ps additive jitter
Available LVPECL, CMOS, LVDS,
and CML outputs
1.8, 2.5, or 3.3 V supply
Pin- and register-compatible with
Si570/571
Programmable with 28 parts per
trillion frequency resolution
Integrated crystal provides stability
and low phase noise
Frequency changes up to
±3500 ppm are glitchless
–40 to 85 °C operation
Industry-standard 5x7 mm package
Si5602
Applications
Ordering Information:
SONET / SDH / xDSL
Ethernet / Fibre Channel
3G SDI / HD SDI
Multi-rate PLLs
Multi-rate reference clocks
Frequency margining
Digital PLLs
CPU / FPGA FIFO control
Adaptive synchronization
Agile RF local oscillators
See page 22.
Pin Assignments:
See page 21.
(Top View)
SDA
7
NC
1
2
3
8
SCL
6
5
4
V
DD
Description
The Si598 XO/Si599 VCXO utilizes Silicon Laboratories' advanced DSPLL®
circuitry to provide a low-jitter clock at any frequency. They are user-
programmable to any output frequency from 10 to 810 MHz with 28 parts per
trillion (PPT) resolution. The device is programmed via a 2-pin I
2
C compatible
serial interface. The wide frequency range and ultra-fine programming resolution
make these devices ideal for applications that require in-circuit dynamic frequency
adjustments or multi-rate operation with non-integer related rates. Using an
integrated crystal, these devices provide stable low jitter frequency synthesis and
replace multiple XOs, clock generators, and DAC controlled VCXOs.
OE
GND
CLK–
CLK+
Functional Block Diagram
V
DD
OE
Power Supply Filtering
Si598
SDA
Fixed
Frequency
Oscillator
Any Frequency
DSPLL®
10 to 810 MHz
Clock Synthesis
CLK+
CLK–
7
V
C
1
2
3
8
SCL
6
5
4
V
DD
Vc
(Si599)
OE
CLK–
CLK+
ADC
I2C Interface
GND
SDA
SCL
GND
Si599
Rev. 1.0 11/11
Copyright © 2011 by Silicon Laboratories
Si598/Si599
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