EEWORLDEEWORLDEEWORLD

Part Number

Search

CY2544C217T

Description
Clock Generators & Support Products
Categorysemiconductor    Analog mixed-signal IC   
File Size342KB,17 Pages
ManufacturerCypress Semiconductor
Download Datasheet Parametric View All

CY2544C217T Online Shopping

Suppliers Part Number Price MOQ In stock  
CY2544C217T - - View Buy Now

CY2544C217T Overview

Clock Generators & Support Products

CY2544C217T Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerCypress Semiconductor
Product CategoryClock Generators & Support Products
TypeProgrammable Clock Generators
CY2544/CY2546/CY2548
Quad-PLL Programmable Clock Generator
with Spread Spectrum
Quad-PLL Programmable Clock Generator with Spread Spectrum
Features
Glitch free outputs while frequency switching
24-pin QFN package
Commercial and Industrial temperature ranges
One-time programmability
For programming support, contact
Cypress technical support
or send an e-mail to
clocks@cypress.com
Four fully-integrated phase-locked loops (PLLs)
Input frequency range
External crystal: 8 to 48 MHz for CY2544 and CY2546
External reference: 8 to 166 MHz clock
Reference clock input voltage range
2.5 V, 3.0 V, and 3.3 V for CY2548
1.8 V for CY2544 and CY2546
Wide operating output frequency range
3 to 166 MHz
Programmable spread spectrum with center and down spread
option and Lexmark and Linear modulation profiles
V
DD
supply voltage options:
2.5 V, 3.0 V, and 3.3 V for CY2544 and CY2548
1.8 V for CY2546
Selectable output clock voltages:
1.8 V, 2.5 V, 3.0 V, and 3.3 V for CY2544 and CY2548
1.8 V for CY2546
Frequency select feature with option to select eight different
frequencies over nine clock outputs
Power down, output enable, and SS ON/OFF controls
Low jitter, high accuracy outputs
Ability to synthesize nonstandard frequencies with Fractional-N
capability
Up to nine clock outputs with programmable drive strength
Benefits
Multiple high-performance PLLs allow synthesis of unrelated
frequencies
Nonvolatile programming for personalization of PLL
frequencies, spread spectrum characteristics, drive strength,
crystal load capacitance, and output frequencies
Application specific programmable EMI reduction using spread
spectrum for clocks
Programmable PLLs for system frequency margin tests
Meets critical timing requirements in complex system designs
Suitability for PC, consumer, portable, and networking
applications
Capable of Zero PPM frequency synthesis error
Uninterrupted system operation during clock frequency switch
Application compatibility in standard and low-power systems
Functional Description
For a complete list of related documentation, click
here.
Logic Block Diagram
CLKIN
Crossbar
Switch
OSC
PLL1
Output
Dividers
and
Bank
2
CLK1
Bank
1
XIN/
EXCLKIN
XOUT
CLK2
CLK3
CLK4
CLK5
CLK6
CLK7
FS 0
FS 1
FS 2
MUX
and
Control
Logic
PLL2
Drive
Strength
Control
Bank
PLL3
(SS)
3
CLK8
CLK9
PLL4
(SS)
SSON
PD#/OE
Cypress Semiconductor Corporation
Document Number: 001-12563 Rev. *M
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised October 31, 2017
DM3730 dvsdk uboot clock configuration initialization
[align=left][color=#000000]In order to make the touch screen driver work completely according to my own ideas, from the Linux kernel to the driver, to adding various printing information, modifying an...
Jacktang DSP and ARM Processors
How to make the clock signal free of jitter
I would like to ask all the experts, who can make the clock signal, that is, the square wave signal, have no jitter, and the jitter cannot be higher than 400pspp? I would also like to ask all the expe...
zuoqi Embedded System
High power inverter
This circuit was found on the Internet. This circuit converts 12V power supply into high voltage output. Please pay attention to safety when debugging this circuit. Please use this circuit as a resear...
程序天使 Power technology
Made a 51 experimental board
Recently, because there are no hardware projects to do, I want to make a few development boards for fun. It took me a month to finally make the 8051 and avr (atmega64) development boards. In the next ...
黑衣人 51mcu
How to run C# program on mobile phone
How can I run the program I wrote in C# on my mobile phone? My phone is a coolpad....
hsygzdc Embedded System
Brief Introduction to Flyback Converter Principle and Design
[i=s]This post was last edited by qwqwqw2088 on 2021-10-8 08:43[/i]Brief Introduction to the Principle and Design of Flyback ConverterDownload and read the full text directly...
qwqwqw2088 Power technology

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2431  1868  1422  1775  1715  49  38  29  36  35 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号