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MC10EP52DTR2G

Description
Flip Flops 3.3V/5V ECL D-Type Diff Data and Clock
Categorylogic    logic   
File Size175KB,11 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
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MC10EP52DTR2G Overview

Flip Flops 3.3V/5V ECL D-Type Diff Data and Clock

MC10EP52DTR2G Parametric

Parameter NameAttribute value
Brand NameON Semiconductor
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerON Semiconductor
Parts packaging codeSOIC
package instructionTSSOP, TSSOP8,.19
Contacts8
Manufacturer packaging code948R-02
Reach Compliance Codecompliant
Factory Lead Time1 week
Other featuresNECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V
series10E
JESD-30 codeS-PDSO-G8
JESD-609 codee3
length3 mm
Logic integrated circuit typeD FLIP-FLOP
Maximum Frequency@Nom-Sup4000000000 Hz
Humidity sensitivity level3
Number of digits1
Number of functions1
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP8,.19
Package shapeSQUARE
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)260
power supply-5.2 V
Maximum supply current (ICC)47 mA
Prop。Delay @ Nom-Sup0.41 ns
propagation delay (tpd)0.38 ns
Certification statusNot Qualified
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyECL
Temperature levelINDUSTRIAL
Terminal surfaceTin (Sn)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
Trigger typePOSITIVE EDGE
width3 mm
MC10EP52, MC100EP52
3.3 V / 5 V ECL Differential
Data and Clock D Flip‐Flop
Description
The MC10EP/100EP52 is a differential data, differential clock D
flip-flop. The device is pin and functionally equivalent to the EL52
device.
Data enters the master portion of the flip−flop when the clock is
LOW and is transferred to the slave, and thus the outputs, upon a
positive transition of the clock. The differential clock inputs of the
EP52 allow the device to also be used as a negative edge triggered
device.
The EP52 employs input clamping circuitry so that under open input
conditions (pulled down to V
EE
) the outputs of the device will remain
stable.
The 100 Series contains temperature compensation.
Features
www.onsemi.com
8
1
8
1
SOIC−8 NB
TSSOP−8
DFN8
D SUFFIX
DT SUFFIX
MN SUFFIX
CASE 751−07 CASE 948R−02 CASE 506AA
MARKING DIAGRAMS*
8
HEP01
ALYW
G
1
8
KEP01
ALYW
G
1
SOIC−8 NB
H
K
5T
3O
= MC10
= MC100
= MC10
= MC100
KP01
ALYWG
G
TSSOP−8
3OMG
G
1
4
DFN8
8
HP01
ALYWG
G
5T MG
G
1
4
330 ps Typical Propagation Delay
Maximum Frequency =
u
4 GHz Typical
PECL Mode: V
CC
= 3.0 V to 5.5 V with V
EE
= 0 V
NECL Mode: V
CC
= 0 V with V
EE
=
−3.0
V to
−5.5
V
Open Input Default State
Safety Clamp on Inputs
Q Output Will Default LOW with Inputs Open or at V
EE
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
1
8
1
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
M = Date Code
G
= Pb-Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note
AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
©
Semiconductor Components Industries, LLC, 2016
August, 2016
Rev. 8
1
Publication Order Number:
MC10EP52/D

MC10EP52DTR2G Related Products

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Description Flip Flops 3.3V/5V ECL D-Type Diff Data and Clock Flip Flops 3.3V/5V ECL D-Type w/Diff Data and Clk Flip Flops 3.3V/5V ECL D-Type Diff Data and Clock Flip Flops BBG ECL FL/FLOP DIFF Flip Flops 3.3V/5V ECL D-Type Diff Data and Clock Flip Flops 3.3V/5V ECL D-Type w/Diff Data and Clk
Brand Name ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor
Is it lead-free? Lead free Lead free Lead free Lead free Lead free Lead free
Parts packaging code SOIC SOIC SOIC DFN SOIC SOIC
package instruction TSSOP, TSSOP8,.19 SOP, SOP8,.25 SOP, SOP8,.25 HVSON, SOLCC8,.08,20 SOP, SOP8,.25 TSSOP, TSSOP8,.19
Contacts 8 8 8 8 8 8
Manufacturer packaging code 948R-02 751-07 751-07 506AA 751-07 948R-02
Reach Compliance Code compliant compliant compliant compliant compliant compliant
Other features NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V
series 10E 100E 10E 10E 10E 100E
JESD-30 code S-PDSO-G8 R-PDSO-G8 R-PDSO-G8 S-XDSO-N8 R-PDSO-G8 S-PDSO-G8
length 3 mm 4.9 mm 4.9 mm 2 mm 4.9 mm 3 mm
Logic integrated circuit type D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP
Maximum Frequency@Nom-Sup 4000000000 Hz 4000000000 Hz 4000000000 Hz 4000000000 Hz 4000000000 Hz 4000000000 Hz
Humidity sensitivity level 3 1 1 1 1 3
Number of digits 1 1 1 1 1 1
Number of functions 1 1 1 1 1 1
Number of terminals 8 8 8 8 8 8
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
Output polarity COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY UNSPECIFIED PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP SOP SOP HVSON SOP TSSOP
Encapsulate equivalent code TSSOP8,.19 SOP8,.25 SOP8,.25 SOLCC8,.08,20 SOP8,.25 TSSOP8,.19
Package shape SQUARE RECTANGULAR RECTANGULAR SQUARE RECTANGULAR SQUARE
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing TAPE AND REEL RAIL RAIL TAPE AND REEL TAPE AND REEL TAPE AND REEL
Peak Reflow Temperature (Celsius) 260 260 260 260 260 260
power supply -5.2 V -4.5 V -5.2 V -5.2 V -5.2 V -4.5 V
Maximum supply current (ICC) 47 mA 47 mA 47 mA 47 mA 47 mA 47 mA
Prop。Delay @ Nom-Sup 0.41 ns 0.41 ns 0.41 ns 0.41 ns 0.41 ns 0.41 ns
propagation delay (tpd) 0.38 ns 0.38 ns 0.38 ns 0.38 ns 0.38 ns 0.38 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.1 mm 1.75 mm 1.75 mm 1 mm 1.75 mm 1.1 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 3 V 3 V 3 V 3 V 3 V 3 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES YES YES
technology ECL ECL ECL ECL ECL ECL
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface Tin (Sn) Tin (Sn) Tin (Sn) Nickel/Gold/Palladium (Ni/Au/Pd) Tin (Sn) Tin (Sn)
Terminal form GULL WING GULL WING GULL WING NO LEAD GULL WING GULL WING
Terminal pitch 0.65 mm 1.27 mm 1.27 mm 0.5 mm 1.27 mm 0.65 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature 40 40 40 40 40 40
Trigger type POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE
width 3 mm 3.9 mm 3.9 mm 2 mm 3.9 mm 3 mm
Factory Lead Time 1 week 1 week 1 week 1 week - 1 week
JESD-609 code e3 e3 e3 - e3 e3

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