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853S01AGILFT

Description
Clock Drivers & Distribution 2:1 Differential LVPECL Multiplexer
Categorylogic    logic   
File Size434KB,23 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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853S01AGILFT Overview

Clock Drivers & Distribution 2:1 Differential LVPECL Multiplexer

853S01AGILFT Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP16,.25
Contacts16
Manufacturer packaging codePGG16
Reach Compliance Codecompliant
ECCN codeEAR99
Samacsys DescriptionTSSOP 4.4 MM 0.65MM PITCH
JESD-30 codeR-PDSO-G8
JESD-609 codee3
Logic integrated circuit typeMULTIPLEXER
Humidity sensitivity level1
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP16,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
power supply2.5/3.3 V
Prop。Delay @ Nom-Sup0.49 ns
Certification statusNot Qualified
surface mountYES
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
Base Number Matches1
2:1 Differential-to-LVPECL Multiplexer
Datasheet
853S01
General Description
The 853S01 is a high performance 2:1 Differential-to-LVPECL
Multiplexer. The 853S01 can also perform differential translation
because the differential inputs accept LVPECL, LVDS and CML
levels. The 853S01 is packaged in a small 3mm x 3mm 16 VFQFN
package, making it ideal for use on space constrained boards.
Features
One LVPECL output pair
Two selectable differential LVPECL clock inputs
PCLKx, nPCLKx pairs can accept the following
differential input levels: LVPECL, LVDS, CML
Translates LVCMOS/LVTTL input signals to LVPECL levels by
using a resistor bias network on nPCLKx, nPCLKx
Part-to-part skew: 150ps (maximum)
Propagation delay: 490ps (maximum)
Full 3.3V or 2.5V operating supply
-40°C to 85°C ambient operating temperature
Available in lead-free (RoHS 6) packages
Block Diagram
PCLK0
Pulldown
nPCLK0
Pullup/Pulldown
PCLK1
Pulldown
nPCLK1
Pullup/Pulldown
CLK_SEL
Pulldown
V
BB
1
0
Q
nQ
Pin Assignments
PCLK0 1
nPCLK0
2
16 15 14 13
12 V
EE
11 Q
10 nQ
9 V
EE
5
V
BB
V
EE
V
CC
V
EE
nc
PCLK1 3
nPCLK1 4
6
CLK_SEL
7
nc
8
V
CC
ICS853S01I
16-Lead VFQFN
3mm x 3mm x 0.925mm package body
K Package
Top View
PCLK0
nPCLK0
PCLK1
nPCLK1
V
BB
CLK_SEL
nc
V
CC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
nc
V
EE
V
EE
V
CC
V
EE
Q
nQ
V
EE
853S01
16-Lead TSSOP
4.4mm x 5.0mm x 0.925
mm package body
G Package
Top View
©2016 Integrated Device Technology, Inc.
1
Revision B, March 4, 2016

853S01AGILFT Related Products

853S01AGILFT
Description Clock Drivers & Distribution 2:1 Differential LVPECL Multiplexer
Brand Name Integrated Device Technology
Is it lead-free? Lead free
Is it Rohs certified? conform to
Maker IDT (Integrated Device Technology)
Parts packaging code TSSOP
package instruction TSSOP, TSSOP16,.25
Contacts 16
Manufacturer packaging code PGG16
Reach Compliance Code compliant
ECCN code EAR99
Samacsys Description TSSOP 4.4 MM 0.65MM PITCH
JESD-30 code R-PDSO-G8
JESD-609 code e3
Logic integrated circuit type MULTIPLEXER
Humidity sensitivity level 1
Number of terminals 8
Maximum operating temperature 85 °C
Minimum operating temperature -40 °C
Package body material PLASTIC/EPOXY
encapsulated code TSSOP
Encapsulate equivalent code TSSOP16,.25
Package shape RECTANGULAR
Package form SMALL OUTLINE
Peak Reflow Temperature (Celsius) 260
power supply 2.5/3.3 V
Prop。Delay @ Nom-Sup 0.49 ns
Certification status Not Qualified
surface mount YES
Temperature level INDUSTRIAL
Terminal surface Matte Tin (Sn) - annealed
Terminal form GULL WING
Terminal pitch 0.635 mm
Terminal location DUAL
Maximum time at peak reflow temperature 30
Base Number Matches 1
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