8S89831AKILFT datasheet, PDF - EEWORLD Datasheet

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8S89831AKILFT: DescriptionClock Drivers & Distribution 1:4 Differential to LVEPCL/ECO Fanout Bu; Categorylogic logic; File Size440KB，18 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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8S89831AKILFT Overview

Clock Drivers & Distribution 1:4 Differential to LVEPCL/ECO Fanout Bu

8S89831AKILFT Parametric

Parameter Name	Attribute value
Brand Name	Integrated Device Technology
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Parts packaging code	VFQFPN
package instruction	VFQFN-16
Contacts	16
Manufacturer packaging code	NLG16P2
Reach Compliance Code	compliant
ECCN code	EAR99
series	89831
Input adjustment	DIFFERENTIAL
JESD-30 code	S-XQCC-N16
JESD-609 code	e3
length	3 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER
Humidity sensitivity level	3
Number of functions	1
Number of inverted outputs
Number of terminals	16
Actual output times	4
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	OPEN-COLLECTOR
Package body material	UNSPECIFIED
encapsulated code	HVQCCN
Encapsulate equivalent code	LCC16,.12SQ,20
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	260
power supply	+-2.5/+-3.3 V
Prop。Delay @ Nom-Sup	0.57 ns
propagation delay (tpd)	0.57 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.03 ns
Maximum seat height	1 mm
Maximum supply voltage (Vsup)	3.465 V
Minimum supply voltage (Vsup)	2.375 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	3 mm
minfmax	2100 MHz
Base Number Matches	1

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Differential LVPECL-To-LVPECL/ECL

Fanout Buffer

8S89831I

Datasheet

Description

The 8S89831I is a high speed 1-to-4 Differential- to-LVPECL/ECL

Fanout Buffer. The 8S89831I is optimized for high speed and very

low output skew, making it suitable for use in demanding applications

such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fiber

Channel. The internally terminated differential input and V

REF

allow other differential signal families such as LVDS, LVHSTL and

CML to be easily interfaced to the input with minimal use of external

components.

The device also has an output enable pin which may be useful for

system test and debug purposes. The 8S89831I is packaged in a

small 3mm x 3mm 16-pin VFQFN package which makes it ideal for

use in space-constrained applications.

Features

•

Four LVPECL/ECL outputs

IN, nIN input can accept the following differential input levels:

LVPECL, LVDS, CML, SSTL



internal input termination to V

Output frequency: >2.1GHz

Output skew: 30ps (maximum)

Part-to-part skew: 185ps (maximum)

Additive phase jitter, RMS: 0.31ps (typical)

Propagation Delay: 570ps (maximum)

LVPECL mode operating voltage supply range:

= 2.5V±5%, 3.3V±5%, V

= 0V

ECL mode operating voltage supply range:

= 0V, V

= -3.3V±5%, -2.5V±5%

-40°C to 85°C ambient operating temperature

Available in lead-free (RoHS 6) package

Supports

≤

105°C board temperature operations

Block Diagram

Pullup

nQ0

50Ω

Pin Assignment

nQ0

Q1 1

nQ1

16 15 14 13

12 IN

11 V

10 V

REF_AC

9 nIN

nIN

REF_AC

Q2 3

nQ1

nQ2 4

nQ3

nQ2

8S89831I

16-Lead VFQFN

3mm x 3mm x 0.925mm package body

K Package

Top View

nQ3

November 9, 2017

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