Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise noted)
Characteristic
OFF CHARACTERISTICS
Peak Repetitive Forward or Reverse Blocking Current
(V
AK
= Rated V
DRM
or V
RRM
, Gate Open)
ON CHARACTERISTICS
Peak Forward On−State Voltage (Note 2)
(I
TM
= 32 A)
Gate Trigger Current (Continuous dc)
(V
D
= 12 V, R
L
= 100
W)
Gate Trigger Voltage (Continuous dc)
(V
D
= 12 V, R
L
= 100
W)
Hold Current
(Anode Voltage = 12 V, Initiating Current = 200 mA, Gate Open)
Latch Current
(V
D
= 12 V, Ig = 200 mA)
DYNAMIC CHARACTERISTICS
Critical Rate of Rise of Off−State Voltage
(V
D
= Rated V
DRM
, Exponential Waveform, Gate Open, T
J
= 125°C)
Critical Rate of Rise of On−State Current
(I
PK
= 50 A, Pw = 30
ms,
diG/dt = 1 A/msec, Igt = 50 mA)
2. Indicates Pulse Test: Pulse Width
v
2.0 ms, Duty Cycle
v
2%.
dv/dt
di/dt
100
−
300
−
−
50
V/ms
A/ms
V
TM
I
GT
V
GT
I
H
I
L
−
2.0
0.5
4.0
−
−
10
0.65
25
30
1.7
20
1.0
40
60
V
mA
V
mA
mA
T
J
= 25°C
T
J
= 125°C
I
DRM
,
I
RRM
−
−
−
−
0.01
2.0
mA
Symbol
Min
Typ
Max
Unit
Voltage Current Characteristic of SCR
+ Current
Anode +
V
TM
on state
I
RRM
at V
RRM
I
H
Symbol
V
DRM
I
DRM
V
RRM
I
RRM
V
TM
I
H
Parameter
Peak Repetitive Off State Forward Voltage
Peak Forward Blocking Current
Peak Repetitive Off State Reverse Voltage
Peak Reverse Blocking Current
Peak On State Voltage
Holding Current
Reverse Blocking Region
(off state)
Reverse Avalanche Region
Anode −
+ Voltage
I
DRM
at V
DRM
Forward Blocking Region
(off state)
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2
MCR16N
130
TC, CASE TEMPERATURE (
°
C)
120
α
α
= CONDUCTION ANGLE
110
P(AV), AVERAGE POWER DISSIPATION (WATTS)
32
180°
60°
90°
dc
24
α
α
= CONDUCTION ANGLE
α
= 30°
16
100
90
80
0
2
4
α
= 30°
6
60°
8
90°
10
180°
12
14
8
dc
0
0
2
4
6
8
10
12
14
16
I
T(AV)
, AVERAGE ON−STATE CURRENT (AMPS)
16
I
T(RMS)
, ITRMS ON−STATE CURRENT (AMPS)
Figure 1. Typical RMS Current Derating
Figure 2. On State Power Dissipation
Typical @ T
J
= 25°C
R(t) TRANSIENT THERMAL R (NORMALIZED)
100
1
Maximum @ T
J
= 125°C
Z
qJC(t)
= R
qJC(t)
⋅
r(t)
0.1
I T , INSTANTANEOUS ON−STATE CURRENT (AMPS)
10
0.01
0.1
1
10
100
1000
1⋅10
4
Maximum @ T
J
= 25°C
t, TIME (ms)
Figure 4. Transient Thermal Response
100
IH, HOLDING CURRENT (mA)
1
10
0.1
0.5
1.3
1.7
2.1
0.9
V
T
, INSTANTANEOUS ON−STATE VOLTAGE (VOLTS)
2.5
1
−40 −25 −10
5
20
35
50
65
80
95
110 125
T
J
, JUNCTION TEMPERATURE (°C)
Figure 3. Typical On−State Characteristics
Figure 5. Typical Holding Current versus
Junction Temperature
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3
MCR16N
100
GATE TRIGGER CURRENT (mA)
−40 −25 −10
5
20
35
50
65
80
95
110
125
IL , LATCHING CURRENT (mA)
30
25
20
15
10
5
0
−40 −25 −10
5
20
35
50
65
80
95
110 125
T
J
, JUNCTION TEMPERATURE (°C)
T
J
, JUNCTION TEMPERATURE (°C)
10
1
Figure 6. Typical Latching Current versus
Junction Temperature
Figure 7. Typical Gate Trigger Current versus
Junction Temperature
1.0
V GT, GATE TRIGGER VOLTAGE (VOLTS)
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
−40 −25 −10
5
20
35
50
65
80
95
110 125
T
J
, JUNCTION TEMPERATURE (°C)
I TSM , PEAK SURGE CURRENT (AMP)
160
1 Cycle
150
140
130
120
110
T
J
= 125°C f = 60 Hz
100
90
1
2
3
4
5
6
7
8
9
10
NUMBER OF CYCLES
Figure 8. Typical Gate Trigger Voltage versus
Junction Temperature
Figure 9. Maximum Non−Repetitive
Surge Current
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4
MCR16N
PACKAGE DIMENSIONS
TO−220AB
CASE 221A−09
ISSUE AA
−T−
B
4
SEATING
PLANE
F
T
S
C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
T
U
V
Z
INCHES
MIN
MAX
0.570
0.620
0.380
0.405
0.160
0.190
0.025
0.035
0.142
0.147
0.095
0.105
0.110
0.155
0.018
0.025
0.500
0.562
0.045
0.060
0.190
0.210
0.100
0.120
0.080
0.110
0.045
0.055
0.235
0.255
0.000
0.050
0.045
−−−
−−−
0.080
CATHODE
ANODE
GATE
ANODE
MILLIMETERS
MIN
MAX
14.48
15.75
9.66
10.28
4.07
4.82
0.64
0.88
3.61
3.73
2.42
2.66
2.80
3.93
0.46
0.64
12.70
14.27
1.15
1.52
4.83
5.33
2.54
3.04
2.04
2.79
1.15
1.39
5.97
6.47
0.00
1.27
1.15
−−−
−−−
2.04
Q
1 2 3
A
U
K
H
Z
L
V
G
D
N
R
J
STYLE 3:
PIN 1.
2.
3.
4.
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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