IDT70V08L20PFI datasheet, PDF - EEWORLD Datasheet

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IDT70V08L20PFI: Description64K X 8 DUAL-PORT SRAM, 20 ns, PQFP100; Categorystorage; File Size165KB，20 Pages; ManufacturerIDT (Integrated Device Technology, Inc.); Websitehttp://www.idt.com/

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IDT70V08L20PFI Overview

64K X 8 DUAL-PORT SRAM, 20 ns, PQFP100

IDT70V08L20PFI Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	100
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Maximum supply/operating voltage	3.6 V
Minimum supply/operating voltage	3 V
Rated supply voltage	3.3 V
maximum access time	20 ns
Processing package description	14 X 14 MM, 1.40 MM HEIGHT, TQFP-100
state	ACTIVE
Craftsmanship	CMOS
packaging shape	SQUARE
Package Size	FLATPACK, LOW PROFILE, FINE PITCH
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	0.5000 mm
terminal coating	TIN LEAD
Terminal location	QUAD
Packaging Materials	PLASTIC/EPOXY
Temperature level	INDUSTRIAL
memory width	8
organize	64K X 8
storage density	524288 deg
operating mode	ASYNCHRONOUS
Number of digits	65536 words
Number of digits	64K
Memory IC type	DUAL-PORT SRAM
serial parallel	PARALLEL

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HIGH-SPEED

64K x 8 DUAL-PORT

STATIC RAM

Features

True Dual-Ported memory cells which allow simultaneous

access of the same memory location

High-speed access

– Commercial: 15/20/25/35ns (max.)

Low-power operation

– IDT70V08S

Active: 550mW (typ.)

Standby: 5mW (typ.)

– IDT70V08L

Active: 550mW (typ.)

Standby: 1mW (typ.)

Dual chip enables allow for depth expansion without

external logic

IDT70V08 easily expands data bus width to 16 bits or

IDT70V08S/L

more using the Master/Slave select when cascading more

than one device

M/S = V

for

BUSY

output flag on Master,

M/S = V

for

BUSY

input on Slave

Busy and Interrupt Flags

On-chip port arbitration logic

Full on-chip hardware support of semaphore signaling

between ports

Fully asynchronous operation from either port

LVTTL-compatible, single 3.3V (±0.3V) power supply

Available in a 100-pin TQFP

Industrial temperature range (–40°C to +85°C) is available

for selected speeds

Functional Block Diagram

R/W

I/O

0-7L

I/O

Control

(1,2)

I/O

Control

I/O

0-7R

(1,2)

BUSY

64Kx8

MEMORY

ARRAY

70V08

15R

15L

Address

Decoder

Address

Decoder

15L

R/W

SEM

(2)

INT

M/S

NOTES:

BUSY

is an input as a Slave (M/S-V

) and an output when it is a Master (M/S-V

BUSY

and

INT

are non-tri-state totem-pole outputs (push-pull).

ARBITRATION

INTERRUPT

SEMAPHORE

LOGIC

15R

R/W

SEM

(2)

INT

3740 drw 01

(1)

JANUARY 2001

DSC-3740/4

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