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8535AG-01LFT

Description
TSSOP-20, Reel
Categorylogic   
File Size829KB,19 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
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8535AG-01LFT Overview

TSSOP-20, Reel

8535AG-01LFT Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP20,.25
Contacts20
Manufacturer packaging codePGG20
Reach Compliance Codecompliant
ECCN codeEAR99
Samacsys Confidence3
Samacsys StatusReleased
Samacsys PartID11129339
Samacsys Pin Count20
Samacsys Part CategoryIntegrated Circuit
Samacsys Package CategorySmall Outline Packages
Samacsys Footprint NamePGG20/-3
Samacsys Released Date2020-01-21 04:02:20
Is SamacsysN
series8535
Input adjustmentMUX
JESD-30 codeR-PDSO-G20
JESD-609 codee3
length6.5 mm
Logic integrated circuit typeLOW SKEW CLOCK DRIVER
Humidity sensitivity level1
Number of functions1
Number of inverted outputs
Number of terminals20
Actual output times4
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP20,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Prop。Delay @ Nom-Sup1.9 ns
propagation delay (tpd)1.9 ns
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.03 ns
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.465 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width4.4 mm
Base Number Matches1
Low Skew, 1-to-4 LVCMOS/LVTTL-to-3.3V
LVPECL Fanout Buffer
ICS8535-01
DATA SHEET
General Description
The ICS8535-01 is a low skew, high performance 1-to-4
LVCMOS/LVTTL-to-3.3V LVPECL fanout buffer. The ICS8535- 01
has two single ended clock inputs. the single ended clock input
accepts LVCMOS or LVTTL input levels and translate them to 3.3V
LVPECL levels. The clock enable is internally synchronized to
eliminate runt clock pulses on the output during asynchronous
assertion/deassertion of the clock enable pin.
Guaranteed output and part-to-part skew characteristics make the
ICS8535-01 ideal for those applications demanding well defined
performance and repeatability.
Features
• Four differential 3.3V LVPECL outputs
• Selectable CLK0 or CLK1 inputs for redundant and multiple
frequency fanout applications
• CLK0 or CLK1 can accept the following input levels:
LVCMOS or LVTTL
• Maximum output frequency: 266MHz
• Translates LVCMOS and LVTTL levels to 3.3V LVPECL levels
• Output skew: 30ps (maximum)
• Part-to-part skew: 250ps (maximum)
• Propagation delay: 1.9ns (maximum)
Pin Assignment
V
EE
CLK_EN
CLK_SEL
CLK0
nc
CLK1
nc
nc
nc
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Q0
nQ0
V
CC
Q1
nQ1
Q2
nQ2
V
CC
Q3
nQ3
• Additive phase jitter, RMS: < 0.09ps (typical)
• 3.3V operating supply
• 0°C to 70°C ambient operating temperature
• Lead-free (RoHS 6) packaging
Block Diagram
CLK_EN
D
Q
LE
CLK0
CLK1
0
1
Q0
nQ0
Q1
nQ1
ICS8535-01
20-Lead TSSOP
4.4mm x 6.5mm x 0.92 body package
G Package
Top View
V
CC
nQ0
nQ1
Q0
Q1
CLK_SEL
Q2
nQ2
Q3
nQ3
20 19 18 17 16
V
CC
nQ3
Q3
V
EE
CLK_EN
1
2
3
4
5
6
CLK_SEL
7
CLK0
8
nc
9 10
CLK1
nc
15 V
CC
14 Q2
13 nQ2
12 V
CC
11 nc
ICS8535-01
20-Lead VFQFN
4mm x 4mm x 0.9 body package
K Package
Top View
ICS8535-01 REVISION F 08/11/14
1
©2014 Integrated Device Technology, Inc.

8535AG-01LFT Related Products

8535AG-01LFT 8535AK-01LFT 8535AK-01LF
Description TSSOP-20, Reel VFQFPN-20, Reel VFQFPN-20, Tube
Brand Name Integrated Device Technology Integrated Device Technology Integrated Device Technology
Is it lead-free? Lead free Lead free Lead free
Is it Rohs certified? conform to conform to conform to
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code TSSOP VFQFPN VFQFPN
package instruction TSSOP, TSSOP20,.25 VQFN-20 VQFN-20
Contacts 20 20 20
Manufacturer packaging code PGG20 NLG20P1 NLG20P1
Reach Compliance Code compliant compliant compliant
ECCN code EAR99 EAR99 EAR99
series 8535 8535 8535
Input adjustment MUX MUX MUX
JESD-30 code R-PDSO-G20 S-XQCC-N20 S-XQCC-N20
JESD-609 code e3 e3 e3
length 6.5 mm 4 mm 4 mm
Logic integrated circuit type LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER
Humidity sensitivity level 1 1 1
Number of functions 1 1 1
Number of terminals 20 20 20
Actual output times 4 4 4
Maximum operating temperature 70 °C 70 °C 70 °C
Package body material PLASTIC/EPOXY UNSPECIFIED UNSPECIFIED
encapsulated code TSSOP HVQCCN HVQCCN
Encapsulate equivalent code TSSOP20,.25 LCC20,.16SQ,20 LCC20,.16SQ,20
Package shape RECTANGULAR SQUARE SQUARE
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) 260 260 260
power supply 3.3 V 3.3 V 3.3 V
Prop。Delay @ Nom-Sup 1.9 ns 1.9 ns 1.9 ns
propagation delay (tpd) 1.9 ns 1.9 ns 1.9 ns
Certification status Not Qualified Not Qualified Not Qualified
Same Edge Skew-Max(tskwd) 0.03 ns 0.03 ns 0.03 ns
Maximum seat height 1.2 mm 1 mm 1 mm
Maximum supply voltage (Vsup) 3.465 V 3.465 V 3.465 V
Minimum supply voltage (Vsup) 3.135 V 3.135 V 3.135 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V
surface mount YES YES YES
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed
Terminal form GULL WING NO LEAD NO LEAD
Terminal pitch 0.65 mm 0.5 mm 0.5 mm
Terminal location DUAL QUAD QUAD
Maximum time at peak reflow temperature 30 NOT SPECIFIED NOT SPECIFIED
width 4.4 mm 4 mm 4 mm
Base Number Matches 1 1 1
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