LD39300
Ultra low drop BICMOS voltage regulator
Feature summary
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3A Guaranteed output current
Ultra low dropout voltage (200mV typ. @ 3A
load, 40mV typ. @600mA load)
Very low quiescent current (1.2mA typ. @ 3A
load, 1µA max @ 25°C in off mode)
Logic-controlled electronic shutdown
Current and thermal internal limit
PPAK
DPAK
±
1.5% Output voltage tolerance @ 25°C
Fixed and ADJ output voltages: 1.22V, 1.8V,
2.5V, 3.3V, ADJ. (*see order code)
Temperature range: -40 to 125°C
Fast dynamic response to line and load
changes
Stable with ceramic capacitor (see paragraph
7.1, 7.2, 7.3)
Available in PPAK and DPAK
Description
The LD39300 is a fast ultra low drop linear
regulator which operates from 2.5V to 6V input
supply.
A wide range of output options are available. The
low drop voltage, low noise, and ultra low
quiescent current make it suitable for low voltage
microprocessor and memory applications. The
device is developed on a BiCMOS process which
allows low quiescent current operation
independently of output load current.
Typical application
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Microprocessor power supply
DSPs power supply
Post regulators for switchin suppliers
High efficiency linear regulator
Order codes
Part numbers
Output voltage
DPAK
LD39300DT12-R
LD39300DT18-R
LD39300DT25-R
LD39300DT33-R
LD39300PT18-R
LD39300PT25-R
LD39300PT33-R
LD39300PT-R
January 2007
Rev. 1
PPAK
1.22V
1.8V
2.5V
3.3V
ADJ From 1.22 to 5.0V
1/17
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17
LD39300
Contents
1
2
3
4
5
6
7
Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Typical application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Application notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7.1
7.2
7.3
7.4
7.5
External capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Input capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Thermal note . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Inhibit input operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
8
9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/17
LD39300
Diagram
1
Figure 1.
Diagram
Block diagram
(*) Not present on ADJ Versions
3/17
Pin configuration
LD39300
2
Figure 2.
Pin configuration
Pin connections (top view for DPAK and PPAK)
PPAK
DPAK
Table 1.
Pln N°
Pin description
Symbol
Note
PPAK
5
DPAK
V
SENSE
/N.C. For fixed versions: Not Connected on PPAK
ADJ
For adjustable version: Error Amplifier Input pin for V
O
from 1.22 to 5.0V
LDO Input Voltage; V
I
from 2.5V to 6V, C
I
=1µF must be located at a distance of not
more than 0.5’’ from input pin.
LDO Output Voltage pins, with minimum C
O
=4.7µF needed for stability (also refer
to C
O
vs. ESR stability chart)
Inhibit Input Voltage: ON MODE when V
INH
≥
2V, OFF MODE when V
INH
≤
0.3V
(Do not leave floating, not internally pulled down/up)
Common ground
2
4
1
3
1
3
V
I
V
O
V
INH
2
GND
4/17
LD39300
Typical application circuits
3
Typical application circuits
(C
I
and C
O
Capacitors must be placed as close as possible to the IC pins)
Figure 3.
LD39300 Fixed version with inhibit
1
Figure 4.
Inhibit Pin is not internally pulled down/up then it must not be left floating. Disable the device
when connected to GND or to a positive voltage less than 0.3V
LD39300 Adjustable version
V
O
= V
REF
(1 + R
1
/R
2
)
2
Set R2 as close as possible to 4.7K
Ω.
5/17
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