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74LVT374SJ

Description
Flip Flops Oct D-Type Flip-Flop
Categorylogic    logic   
File Size305KB,10 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
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74LVT374SJ Overview

Flip Flops Oct D-Type Flip-Flop

74LVT374SJ Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerON Semiconductor
package instructionSOP,
Reach Compliance Codecompliant
seriesLVT
JESD-30 codeR-PDSO-G20
length12.6 mm
Logic integrated circuit typeBUS DRIVER
Number of digits8
Number of functions1
Number of ports2
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
propagation delay (tpd)5.2 ns
Maximum seat height2.1 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width5.3 mm
Base Number Matches1
74LVT374, 74LVTH374 — Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs
January 2008
74LVT374, 74LVTH374
Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs
Features
Input and output interface capability to systems at
General Description
The LVT374 and LVTH374 are high-speed, low-power
octal D-type flip-flops featuring separate D-type inputs
for each flip-flop and 3-STATE outputs for bus-oriented
applications. A buffered Clock (CP) and Output Enable
(OE) are common to all flip-flops.
The LVTH374 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These octal flip-flops are designed for low-voltage (3.3V)
V
CC
applications, but with the capability to provide a TTL
interface to a 5V environment. The LVT374 and
LVTH374 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining low power dissipation.
5V V
CC
Bus-Hold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH374),
also available without bushold feature (74LVT374)
Live insertion/extraction permitted
Power Up/Down high impedance provides glitch-free
bus loading
Outputs source/sink –32mA/+64mA
Functionally compatible with the 74 series 374
Latch-up performance exceeds 500mA
ESD performance:
– Human-body model
>
2000V
– Machine model
>
200V
– Charged-device model
>
1000V
Ordering Information
Order Number
74LVT374WM
74LVT374SJ
74LVT374MTC
74LVTH374WM
74LVTH374SJ
74LVTH374MTC
Package
Number
M20B
M20D
MTC20
M20B
M20D
MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1999 Fairchild Semiconductor Corporation
74LVT374, 74LVTH374 Rev. 1.5.0
www.fairchildsemi.com

74LVT374SJ Related Products

74LVT374SJ 74LVT374WM
Description Flip Flops Oct D-Type Flip-Flop Flip Flops Oct D-Type Flip-Flop
Is it Rohs certified? conform to conform to
Maker ON Semiconductor ON Semiconductor
package instruction SOP, SOP,
Reach Compliance Code compliant compliant
series LVT LVT
JESD-30 code R-PDSO-G20 R-PDSO-G20
length 12.6 mm 12.8 mm
Logic integrated circuit type BUS DRIVER BUS DRIVER
Number of digits 8 8
Number of functions 1 1
Number of ports 2 2
Number of terminals 20 20
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Output characteristics 3-STATE 3-STATE
Output polarity TRUE TRUE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP SOP
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED
propagation delay (tpd) 5.2 ns 5.2 ns
Maximum seat height 2.1 mm 2.65 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V
Minimum supply voltage (Vsup) 2.7 V 2.7 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL
Terminal form GULL WING GULL WING
Terminal pitch 1.27 mm 1.27 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
width 5.3 mm 7.5 mm
Base Number Matches 1 1
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