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853S024AYLFT

Description
Clock Drivers & Distribution 24 LVPECL OUT BUFFER
Categorylogic    logic   
File Size731KB,19 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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853S024AYLFT Overview

Clock Drivers & Distribution 24 LVPECL OUT BUFFER

853S024AYLFT Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeTQFP
package instruction10 X 10 MM, 1 MM HEIGHT, ROHS COMPLIANT, MS-026ACD, TQFP-64
Contacts64
Manufacturer packaging codeEDG64P2
Reach Compliance Codecompliant
ECCN codeEAR99
Is SamacsysN
Other featuresALSO OPERATES ON 2.5V SUPPLY
series853S
Input adjustmentDIFFERENTIAL
JESD-30 codeS-PQFP-G64
JESD-609 codee3
length10 mm
Logic integrated circuit typeLOW SKEW CLOCK DRIVER
Humidity sensitivity level3
Number of functions1
Number of inverted outputs
Number of terminals64
Actual output times24
Maximum operating temperature70 °C
Minimum operating temperature
Output characteristicsOPEN-EMITTER
Package body materialPLASTIC/EPOXY
encapsulated codeHTFQFP
Encapsulate equivalent codeTQFP64,.47SQ
Package shapeSQUARE
Package formFLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)260
power supply2.5/3.3 V
Prop。Delay @ Nom-Sup0.8 ns
propagation delay (tpd)0.8 ns
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.125 ns
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)2.625 V
Minimum supply voltage (Vsup)2.375 V
Nominal supply voltage (Vsup)2.5 V
surface mountYES
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width10 mm
minfmax2000 MHz
Base Number Matches1
Low Skew, 1-to-24, Differential-to-3.3V, 2.5V
LVPECL Fanout Buffer
ICS853S024
DATA SHEET
General Description
The ICS853S024 is a low skew, 1-to-24 Differential-to-3.3V, 2.5V
LVPECL Fanout Buffer. The PCLK, nPCLK pair can accept most
standard differential input levels. The ICS853S024 is characterized
to operate from either a 3.3V or a 2.5V power supply. Guaranteed
output skew characteristics make the ICS853S024 ideal for those
clock distribution applications demanding well defined performance
and repeatability.
Features
Twenty four LVPECL outputs.
One differential clock input pair
Differential input clock (PCLK, nPCLK) can accept the following
signaling levels: LVDS, LVPECL, CML
Maximum output frequency: 2GHz
Translates any single ended input signal to 3.3V, 2.5V LVPECL
levels with resistor bias on nPCLK input
Output skew: 125ps (maximum)
Rise and Fall Time: 180ps (typical)
Additive phase jitter, RMS: 0.15ps (typical) @ 156.25MHz
Full 3.3V or 2.5V supply voltage
0°C to 70°C ambient operating temperature
Available in lead-free (RoHS 6) package
Block Diagram
PCLK
Pulldown
nPCLK
Pullup/Pulldown
24
24
Pin Assignment
Q23
nQ22
Q22
nQ[0:23]
V
CC
V
EE
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
Q4
nQ4
Q5
nQ5
V
EE
V
CC
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
48
47
3
46
4
45
ICS853S024
5
44
64-Lead TQFP, EPad
6
43
10mm x 10mm x 1mm
7
42
8
41
package body
9
40
Y Package
10
39
Top View
11
38
12
37
13
36
14
35
1
2
15
34
16
33
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
nQ6
Q7
nQ7
Q8
nQ8
Q9
nQ9
Q10
nQ10
Q11
nQ11
V
CC
V
EE
V
CC
Q6
V
EE
V
EE
Q[0:23]
nQ21
Q21
nQ20
V
CC
V
CC
nQ23
Q20
nQ19
Q19
nQ18
Q18
V
CC
nPCLK
PCLK
nQ17
Q17
nQ16
Q16
nQ15
Q15
nQ14
Q14
nQ13
Q13
nQ12
Q12
V
CC
V
CC
ICS853S024AY REVISION A JULY 20, 2011
1
©2011 Integrated Device Technology, Inc.

853S024AYLFT Related Products

853S024AYLFT
Description Clock Drivers & Distribution 24 LVPECL OUT BUFFER
Brand Name Integrated Device Technology
Is it lead-free? Lead free
Is it Rohs certified? conform to
Maker IDT (Integrated Device Technology)
Parts packaging code TQFP
package instruction 10 X 10 MM, 1 MM HEIGHT, ROHS COMPLIANT, MS-026ACD, TQFP-64
Contacts 64
Manufacturer packaging code EDG64P2
Reach Compliance Code compliant
ECCN code EAR99
Is Samacsys N
Other features ALSO OPERATES ON 2.5V SUPPLY
series 853S
Input adjustment DIFFERENTIAL
JESD-30 code S-PQFP-G64
JESD-609 code e3
length 10 mm
Logic integrated circuit type LOW SKEW CLOCK DRIVER
Humidity sensitivity level 3
Number of functions 1
Number of terminals 64
Actual output times 24
Maximum operating temperature 70 °C
Output characteristics OPEN-EMITTER
Package body material PLASTIC/EPOXY
encapsulated code HTFQFP
Encapsulate equivalent code TQFP64,.47SQ
Package shape SQUARE
Package form FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius) 260
power supply 2.5/3.3 V
Prop。Delay @ Nom-Sup 0.8 ns
propagation delay (tpd) 0.8 ns
Certification status Not Qualified
Same Edge Skew-Max(tskwd) 0.125 ns
Maximum seat height 1.2 mm
Maximum supply voltage (Vsup) 2.625 V
Minimum supply voltage (Vsup) 2.375 V
Nominal supply voltage (Vsup) 2.5 V
surface mount YES
Temperature level COMMERCIAL
Terminal surface Matte Tin (Sn)
Terminal form GULL WING
Terminal pitch 0.5 mm
Terminal location QUAD
Maximum time at peak reflow temperature NOT SPECIFIED
width 10 mm
minfmax 2000 MHz
Base Number Matches 1
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