BD3539 provides a constant voltage, VREF, which is independent from the VTT output and can serve as reference input
for memory controllers and DRAMs. The voltage level of VREF is kept constant even if the EN pin is at “Low” level,
making the use of this IC compatible with the “Self Refresh” state of DRAMs.
In order to stabilize the output voltage, connecting the correct combination of capacitor and resistor to VREF is necessary.
For this purpose, a 1.0μF to 2.2μF ceramic capacitor, characterized by minimal variation in capacitance, is recommended.
The maximum current capability of the VREF pin is 25mA, but for an application which consumes a small amount of
VREF current (1mA or less), using a capacitance of 0.1μF or less will do.
5. VTTS
VTTS is a sense pin for the load regulation of the VTT output voltage. In case the wire connecting VTT pin and the load
is too long, connecting VTTS pin to the part of the wire nearer to the load may improve load regulation.
VTTS terminal is High impedance terminal. Therefore it is easy to be affected by the noise. The stable operation of the IC
is possible by inserting RC filter (e.g.,: R=200Ω, C=1000pF) near VTTS terminal.
6. VTT
This is the output pin for the DDR memory termination voltage and it has a sink/source current capability of ±1.0A. VTT
voltage tracks the voltage at VDDQ pin divided in half. The output is turned OFF when EN pin is “Low” or when either the
VCC UVLO or the thermal shutdown protection function is activated.
Always connect a capacitor to VTT pin for loop gain and phase compensation and for reduction in output voltage variation
in the event of sudden load change. Be careful in choosing the capacitor as insufficient capacitance may cause oscillation
and high ESR (Equivalent Series Resistance) may result in increased output voltage variation during a sudden change in
load. A 10µF or so ceramic capacitor is recommended, though ambient temperature and other conditions should also be
considered.
7. EN
A “High” input of 2.3V or higher to EN turns ON the VTT output. A “Low” input of 0.8V or less, on the other hand, turns
VTT to a Hi-Z state. With a “Low” EN input, however, the VREF output remains ON, provided that sufficient VCC and
VDDQ voltages have been established.
When EN terminal repeats ON/OFF, an inrush current may flow in VTT_IN terminal. Please be careful about voltage Drop
of the VTT_IN line.
Absolute Maximum Ratings
Parameter
Input Voltage
Enable Input Voltage
Termination Input Voltage
VDDQ Reference Voltage
Output Current
Power Dissipation1
Power Dissipation2
Power Dissipation3
Operating Temperature Range
Storage Temperature Range
Maximum Junction Temperature
Symbol
V
CC
V
EN
V
TT_IN
V
DDQ
I
TT
Pd1
Pd2
Pd3
Topr
Tstg
Tjmax
Limit
BD3539FVM
7
(Note 1)
7
(Note 1)
7
(Note 1)
7
(Note 1)
1
0.38
(Note 2)
0.58
(Note 3)
-
-30 to +100
-55 to +150
+150
0.24
(Note 4)
0.51
(Note 5)
0.87
(Note 6)
BD3539NUX
Unit
V
V
V
V
A
W
W
W
°C
°C
°C
(Note 1) Should not exceed Pd. Instantaneous surge voltage, back electromotive force and voltage under less than 10% duty cycle.
(Note 2) For Ta≥25°C (With no heat sink)
θja=322.6°C
/W
(Note 3) For Ta≥25°C when mounting a 70mm x 70mm x 1.6mm glass-epoxy substrate, with no heat sink
θja=212.8°C
/W
(Note 4) For Ta≥25°C (With no heat sink)
θja=516.5°C
/W
(Note 5) For Ta≥25°C when mounting a 70mm x 70mm x 1.6mm glass-epoxy substrate 1-layer board,
θja=242.7°C
/W
(Note 6) For Ta≥25°C when mounting a 70mm x 70mm x 1.6mm glass-epoxy substrate 4-layer board (copper foil density: 5505mm
2
(copper foil area in each
layer)),
θja=142.5°C
/W
Caution:
Operating the IC over the absolute maximum ratings may damage the IC. In addition, it is impossible to predict all destructive situations such as
short-circuit modes, open circuit modes, etc. Therefore, it is important to consider circuit protection measures, like adding a fuse, in case the IC is operated in a
special mode exceeding the absolute maximum ratings.
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