End of Life. Last Available Purchase Date is 31-Dec-2014
Si9241A
Vishay Siliconix
Single-Ended Bus Transceiver
DESCRIPTION
The Si9241AEY is a monolithic bus transceiver designed to
provide bidirectional serial communication in automotive
diagnostic applications.
The device incorporates protection against overvoltages and
short circuits to V
BAT
. The transceiver pin is protected and
can be driven beyond the V
BAT
voltage.
The Si9241AEY is built on the Vishay Siliconix BiC/DMOS
process. An epitaxial layer prevents latchup.
The RX output is capable of driving CMOS or 1 x LSTTL
load.
The Si9241AEY is available in a space efficient 8-pin SO
package. It operates reliably over the automotive
temperature range (- 40 to 125 °C). The Si9241AEY is
available in both standard and lead (Pb)-free packages.
FEATURES
• Operating Power Supply Range
6 V
V
BAT
36 V
• Reverse Battery Protection Down to V
BAT
-
24 V
• Standby Mode With Very Low Current Consumption
I
BAT(SB)
= 1 µA at V
DD
= 0.5 V
• Low Quiescent Current in OFF Condition
I
BAT
= 120 µA and I
DD
10 A
• ISO 9141 Compatible
• Overtemperature Shutdown Function For K Output
• Defined K Output OFF for Open GND
• Defined Receive Output Status for Open K Input
• Defined K Output OFF for TX Input Open
• Open Drain Fault Output
• 2 kV ESD
• Typical Transmit Speeds of 200 kBaud
PIN CONFIGURATION AND FUNCTIONAL BLOCK DIAGRAM
V
DD
V
BAT
V
BAT
RX
V
DD
+
-
2
K
CS
TX
FAULT
Fault
Detector
GND
Document Number: 70787
S11-0975-Rev. F, 16-May-11
www.vishay.com
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
End of Life. Last Available Purchase Date is 31-Dec-2014
Si9241A
Vishay Siliconix
OUTPUT TABLE AND STATE DIAGRAMS
Over Temp
Power On
A=1
Over Temp . CS
Short Circuit
Power On
B=1
B=0
A=0
INPUTS
CS
0
0
X
0
1
1
TX
0
1
X
X
X
X
STATE
VARIABLE
A
1
1
0
1
1
1
B
1
1
1
0
1
1
0
1
OUTPUT
TABLE
RX
K
0
1
HiZ
HiZ
0
1
FAULT
1
1
0
0
1
1
Over Temp
Short Circuit
Receive
Mode
Comments
K
K
0
1
CS
Note: Over Temp is an internal condition, not meant
to be a logic signal.
X = "1" or "0"
HiZ = High Impedance State
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltages Referenced to Ground
Voltage On V
BAT
Voltage K
Voltage Difference V
(VBAT, K)
Voltage or Max. Current On Any Pin (Except V
BAT
, K)
Voltage on V
DD
K Pin Only, Short Circuit Duration (to V
BAT
or GND)
Operating Temperature (T
A
)
Junction and Storage Temperature
Thermal Impedance (
JA
)
- 24 to 45
- 16 to (V
BAT
+ 1)
55
- 0.3 to (V
DD
+ 0.3 V) or 10
7
Continuous
- 40 to 125
- 55 to 150
125
°C
°C/W
mA
V
V
Limit
Unit
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Parameter
Voltages Referenced to Ground
V
DD
V
BAT
K
Digital Inputs
4.5 to 5.5
6 to 36
6 to 36
0 to V
DD
V
Limit
Unit
www.vishay.com
2
Document Number: 70787
S11-0975-Rev. F, 16-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
End of Life. Last Available Purchase Date is 31-Dec-2014
Si9241A
Vishay Siliconix
SPECIFICATIONS
Test Conditions Unless Specified
V
DD
= 4.5 V to 5.5 V
V
BAT
= 6 V to 36 V
Limits
- 40 to 125 °C
Temp.
a
Full
Full
Full
V
DD
= 5.5 V, TX or CS = 1.5 V, 3.5 V
R
L
= 510
± 5 %, V
BAT
= 6 to 18
K Output Low Voltage
V
OLK
R
L
= 1 k ± 5 %, V
BAT
= 16 to 36
R
L
= 510
± 5 %, V
BAT
= 4.5
K Output High Voltage
K Rise, Fall Times
K Output Sink Resistance
K Output Capacitance
d
Receiver
K Input Low Voltage
K Input High Voltage
K Input Hysteresis
c, d
K Input Currents
RX Output Low Voltage
RX Pull-up Resistance
V
OHK
t
r
,
tf
Rsi
C
O
V
ILK
V
IHK
V
HYS
I
IHK
V
OLR
R
RX
t
d(on)
R
L
= 510
± 5 %, V
BAT
= 6 V to 18 V
C
L
= 10 nF, See Test Circuit
R
L
= 1 k ± 5 %, V
BAT
= 16 V to 36 V
C
L
= 4.7 nF, See Test Circuit
R
L
= 510
± 5 %, V
BAT
= 6 V to 18 V
C
L
= 10 nF, See Test Circuit
R
L
= 1 k ± 5 %, V
BAT
= 16 V to 36 V
C
L
= 4.7 nF, See Test Circuit
CS = TX = 0 V, V
BAT
16 V
CS = High, V
BAT
12 V, TX = High
f
V
DD
0.5 V, V
BAT
12 V
V
DD
5.5 V, TX = 0 V
CS = High, V
BAT
12 V, TX = High
f
R
L
= 510
,
C
L
= 10 nF
6 V < V
BAT
< 16 V, C
RX
= 20 pF
6 V < V
BAT
< 16 V, R
K
= 510
,
C
K
1.3 nF
CS = TX = 0, K = V
BAT
, I
OLF
= 1 mA
Temperature Rising
CS = 4
V
IHK
= V
BAT
V
ILK
= 0.35 V
BAT
I
OLR
= 1 mA
R
L
= 510
± 5 %, V
BAT
= 4.5 to 18
R
L
= 1 k ± 5 %, V
BAT
= 16 to 36
See Test Circuit
CS = 0 V, TX = 0 V
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
5
3
3
3
3
0.65 V
BAT
0.05 V
BAT
20
0.4
20
10
10
µs
10
10
µA
V
k
0.95 V
BAT
0.95 V
BAT
9.6
110
20
0.35 V
BAT
V
µs
pF
10
20
3.5
10
40
0.2 V
BAT
0.2 V
BAT
1.2
V
Min.
b
Typ.
c
Max.
b
1.5
Unit
Parameter
Transmitter and Logic Levels
CS, TX Input Low Voltage
CS, TX Input High Voltage
TX Input Capacitance
d
CS, TX Input Pull-up Resistance
K Transmit
Symbol
V
ILT
V
IHT
C
INT
R
TX
,
V
pF
k
RX Turn On Delay
RX Turn Off Delay
t
d(off)
Supplies
Bat Supply Current On
Bat Supply Current Off
Bat Supply Current Standby
Logic Supply Current On
Logic Supply Current Off
Miscellaneous
TX Transmit Baud Rate
RX Receive Baud Rate
c
Transmission Frequency
Fault Output Low Voltage
CS Minimum Pulse Width
d, e
Over Temperature Shutdown
d
c
I
BAT(on)
I
BAT(off)
I
BAT(SB)
I
DD(on)
I
DD(off)
BR
T
BR
R
f
K-RXK
V
OLF
t
cs
T
SHUT
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
1
160
50
10.4
1.2
120
<1
1.4
3
220
10
2.3
10
mA
µA
mA
µA
200
200
0.4
180
kBaud
kHz
V
µs
°C
T
HYST
30
Temperature Shutdown Hysteresis
Notes:
a. Room = 25 °C, Cold and Hot = as determined by the operating temperature suffix.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. Guaranteed by design, not subject to production test.
e. Minimum pulse width to reset a fault condition.
f. High referes to Logic High and Low refers to Logic Low.
Document Number: 70787
S11-0975-Rev. F, 16-May-11
www.vishay.com
3
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
End of Life. Last Available Purchase Date is 31-Dec-2014
Si9241A
Vishay Siliconix
PIN CONFIGURATION
Narrow Body
SO Package
V
DD
TX
CS
FAULT
1
2
3
4
8
7
6
5
RX
V
BAT
K
GND
ORDERING INFORMATION
Part Number
Si9241AEY-T1
Si9241AEY-T1-E3 (Lead (Pb)-free)
Temperature Range
- 40 °C to 125 °C
Top View
PIN DESCRIPTION
Pin Number
1
2
3
4
5
6
7
8
Symbol
V
DD
TX
CS
FAULT
GND
K
V
BAT
RX
Description
Positive Power Supply
Transmit, Input
Chip Select, Input
Fault, Open Drain Output
Ground Connection
Transmit/Receive, Bidirectional
Battery Power Supply
Receiver, Output
FUNCTIONAL DESCRIPTION
The Si9241AEY can be either in transmit or receive mode
and it contains over temperature, and short circuit V
BAT
fault
detection circuits.
be asserted. The K pin will stay in high impedance and RX
will follow the K pin. The fault will be reset when CS is toggled
high. RX, CS and TX pins have an internal pull up resistor to
V
DD
while the K pin has internal pull down resistors. When
any one of the TX, V
BAT
or GND pins is open the K output is
off.
The voltage on K is internally compared to V
BAT/2
. If the
voltage on the K pin is less than V
BAT/2
then RX output will
be "low". If the voltage on the K pin is greater than V
BAT/2
then RX output will be "high".
In order to be in transmit mode, CS must be set "low". When
CS and TX are set "low" the internal MOSFET will turn on,
causing the K pin to be "low". In the transmit mode, the
processor monitors RX and TX. When the two mirror each
other there is no fault. In the event of over temperature, or
short circuit to V
BAT
, the Si9241AEY will turn off the K output
to protect the IC and the external open drain FAULT pin will
www.vishay.com
4
When CS is set "high" the Si9241AEY is in receive mode and
the internal MOSFET for the K pin is turned off. The RX
output will follow the K pin. If CS is "low" while the IC is
receiving data, an incorrect fault signal will occur.
To inhibit the short detect, tie CS and TX together.
Document Number: 70787
S11-0975-Rev. F, 16-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
End of Life. Last Available Purchase Date is 31-Dec-2014
Si9241A
Vishay Siliconix
TEST CIRCUIT AND TIMING DIAGRAMS (TRANSMIT ONLY)
V
DD
V
BAT
RX
t
d(off)
t
d(on)
Si9241AEY
V
DD
TX
min
TX
V
BAT
RX
V
DD
+
-
V
+
-
R
L
K
V
BAT
80 %
80 %
C
L
TX
V
K
20 %
20 %
t
r
t
f
GND
CS
R
L
= 510
Ω
, C
L
= 10 nF, V
BAT
= 6 V to 18 V
R
L
= 1 kΩ, C
L
= 4.7 nF, V
BAT
= 16 V to 36 V
APPLICATIONS CIRCUIT
ECU
V
DD
Si9241AEY
Diagnostic Tester
+
V
DD
-
V
B
V
+
-
K-Line
510
Ω
I/Os
Microcontroller
0.4
Ω
V
DD
Si9241AEY
+
V
DD
V
BAT
V
DD
C1
0.1 µF
50 V
C1
0.1 µF
-
V
+
-
L-Line
Bus
ECU = Electronic Control Unit
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Tech-
nology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability
data, see
www.vishay.com/ppg?70787.
Document Number: 70787
S11-0975-Rev. F, 16-May-11
www.vishay.com
5
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
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FPGA/CPLD
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