Ordering number : EN5877
CMOS IC
LC72720N, 72720NM
Single-Chip RDS
Signal-Processing System LSI
Overview
The LC72720N and LC72720NM are single-chip system
ICs that implement the signal processing required by the
European Broadcasting Union RDS (Radio Data System)
standard and by the US NRSC (National Radio System
Committee) RDBS (Radio Broadcast Data System)
standard. These ICs include band-pass filter, demodulator,
synchronization, and error correction circuits as well as
data buffer RAM on chip and perform effective error
correction using a soft-decision error correction technique.
Package Dimensions
unit: mm
3067-DIP24S
[LC72720N]
Functions
• Band-pass filter: Switched capacitor filter (SCF)
• Demodulator: RDS data clock regeneration and
demodulated data reliability information
• Synchronization: Block synchronization detection (with
variable backward and forward protection conditions)
• Error correction: Soft-decision/hard-decision error
correction
• Buffer RAM: Adequate for 24 blocks of data (about 500
ms) and flag memory
• Data I/O: CCB interface (power on reset)
SANYO: DIP24S
unit: mm
3045B-MFP24
[LC72720NM]
Features
• Error correction capability improved by soft-decision
error correction
• The load on the microcontroller can be reduced by
storing decoded data in the on-chip data buffer RAM.
• Two synchronization detection circuits provide
continuous and stable detection of the synchronization
timing.
• Data can be read out starting with the backward-
protection block data after a synchronization reset.
• Fully adjustment free
• Operating power-supply voltage: 4.5 to 5.5 V
• Operating temperature: –40 to +85°C
• Packages: DIP24S, MFP24
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
SANYO: MFP24
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
51398RM (OT) No. 5877-1/14
LC72720N, 72720NM
Pin Assignment
Block Diagram
T3 to T7
No. 5877-2/14
LC72720N, 72720NM
Pin Descriptions
Pin No.
Pin name
Function
I/O
Equivalent circuit
1
VREF
Reference voltage output (Vdda/2)
Output
2
MPXIN
Baseband (multiplexed) signal input
Input
5
FLOUT
Subcarrier output (filter output)
Output
6
CIN
Subcarrier input (comparator input)
Input
3
4
12
Vdda
Vssa
XOUT
Analog system power supply (+5 V)
Analog system ground
Crystal oscillator output (4.332/8.664 MHz)
—
—
Output
—
—
13
XIN
Crystal oscillator input (external reference signal input)
7
T1
Test input (This pin must always be connected to ground.)
Test input (standby control)
0: Normal operation, 1: Standby state (crystal oscillator stopped)
Test I/O (RDS clock output)
Test I/O (RDS data output)
Test I/O (soft-decision control data output)
Test I/O (error status output, regenerated carrier output, error block count
output)
Test I/O (Error correction status output, SK detection output, error block count
output)
Block synchronization detection output
RDS detection output
Data output
Clock input
Data input
Chip enable
Synchronization and RAM address reset (active high)
Digital system power supply (+5 V)
Digital system ground
Serial data interface (CCB)
Input
8
9
10
11
16
T2
T3 (RDCL)
T4 (RDDA)
T5 (RSFT)
T6 (ERROR/57K/BE1)
I/O*
17
18
19
20
21
22
23
24
14
15
T7 (CORREC/ARI-ID/BE0)
SYNC
RDS-ID
DO
CL
DI
CE
SYR
Vddd
Vssd
Output
Input
—
—
—
—
Note:
*
Normally function as an output pin. Used as an I/O pin in test mode, which is not available to user applications.
No. 5877-3/14
LC72720N, 72720NM
Specifications
Absolute Maximum Ratings
at Ta = 25°C, Vssd = Vssa = 0 V
Parameter
Maximum supply voltage
Symbol
V
DD
max
V
IN
1 max
Maximum input voltage
V
IN
2 max
V
IN
3 max
V
O
1 max
Maximum output voltage
V
O
2 max
V
O
3 max
I
O
1 max
Maximum output current
I
O
2 max
I
O
3 max
Allowable power dissipation
Operating temperature
Storage temperature
Pd max
Topr
Tstg
Conditions
Vddd, Vdda (Vdda
≤
Vddd + 0.3 V)
CL, DI, CE, SYR, T1, T2, T3, T4, T5, T6, T7, SYNC
XIN
MPXIN, CIN
DO, SYNC, RDS-ID, T3, T4, T5, T6, T7
XOUT
FLOUT
DO, T3, T4, T5, T6, T7
XOUT, FLOUT
SYNC, RDS-ID
Ta
≤
85°C
DIP24S:
MFP24:
Ratings
–0.3 to +7.0
–0.3 to +7.0
–0.3 to Vddd +0.3
–0.3 to Vdda +0.3
–0.3 to +7.0
–0.3 to Vddd +0.3
–0.3 to Vdda +0.3
6.0
3.0
20.0
350
300
–40 to +85
–55 to +125
Unit
V
V
V
V
V
V
V
mA
mA
mA
mW
mW
°C
°C
Note: A capacitor of at least 1000 pF must be inserted between the power supply pins Vdd and Vss.
Allowable Operating Ranges
at Ta = –40 to +85°C, Vssd = Vssa = 0 V
Parameter
Symbol
V
DD
1
V
DD
2
V
IH
V
IL
V
O
V
IN
1
Input amplitude
V
IN
2
V
XIN
Guaranteed crystal oscillator frequencies
Crystal oscillator frequency deviation
Data setup time
Data hold time
Clock low-level time
Clock high-level time
CE wait time
CE setup time
CE hold time
CE high-level time
Data latch change time
Xtal
TXtal
t
SU
t
HD
t
CL
t
CH
t
EL
t
ES
t
EH
t
CE
t
LC
t
DC
Data output time
t
DH
DO, CL: Differs depending on the value of the
pull-up resistor used.
DO, CE: Differs depending on the value of the
pull-up resistor used.
Conditions
Vddd, Vdda (Vddd = Vdda)
Vddd: Serial data hold voltage
CL, DI, CE, SYR, T1, T2
CL, DI, CE, SYR, T1, T2
DO, SYNC, RDS-ID, T3, T4, T5, T6, T7
MPXIN : f = 57 ±2 kHz
MPXIN : 100% modulation composite
XIN
XIN, XOUT : CI
≤
120
Ω
(XS = 0)
XIN, XOUT : CI
≤
70
Ω
(XS = 1)
XIN, XOUT : f
O
= 4.322 MHz, 8.664 MHz
DI, CL
DI, CL
CL
CL
CE, CL
CE, CL
CE, CL
CE
0.75
0.75
0.75
0.75
0.75
0.75
0.75
20
1.15
0.46
0.46
100
400
4.332
8.664
±100
1500
Ratings
min
4.5
2.0
0.7 Vddd
0
6.5
0.3 Vddd
6.5
50
typ
5.0
max
5.5
Unit
V
V
V
V
V
mVrms
mVrms
mVrms
MHz
MHz
ppm
µs
µs
µs
µs
µs
µs
µs
ms
µs
µs
µs
Supply voltage
Input high-level voltage
Input low-level voltage
Output voltage
Electrical Characteristics
in the allowable operating ranges
Parameter
Symbol
Rmpxin
Rcin
Rf
fc
Conditions
MPXIN–Vssa : f = 57 kHz
CIN–Vssa : f = 57 kHz
XIN
FLOUT
56.5
2.5
28
30
40
50
2.5
Ratings
min
typ
23
100
1.0
57.0
3.0
31
57.5
3.5
34
max
Unit
kΩ
kΩ
MΩ
kHz
kHz
dB
dB
dB
dB
V
Input resistance
Internal feedback resistance
Center frequency
–3 dB bandwidth
Gain
BW – 3 dB FLOUT
Gain
Att1
MPXIN–FLOOUT : f = 57 kHz
FLOUT :
∆f
= ±7 kHz
FLOUT : f < 45 kHz, f > 70 kHz
FLOUT : f < 20 kHz
VREF : Vdda = 5 V
Stop band attenuation
Att2
Att3
Reference voltage output
Vref
Continued on next page.
No. 5877-4/14
LC72720N, 72720NM
Continued from preceding page.
Parameter
Hysteresis
Output low-level voltage
Symbol
V
HIS
V
OL
1
V
OL
2
I
IH
1
I
IH
2
I
IL
1
I
IL
2
I
OFF
Idd
Conditions
CL, DI, CE, SYR, T1, T2
DO, T3, T4, T5, T6, T7 : I = 2 mA
SYNC, RDS-ID : I = 8 mA
CL, DI, CE, SYR, T1, T2 : V
I
= 6.5 V
XIN : V
I
= Vddd
CL, DI, CE, SYR, T1, T2 : V
I
= 0 V
XIN : V
I
= 0 V
DO, SYNC, RDS-ID, T3, T4, T5, T6, T7 :
V
O
= 6.5 V
Vddd + Vdda
12
2.0
2.0
Ratings
min
typ
0.1 Vddd
0.4
0.4
5.0
11
5.0
11
5.0
max
Unit
V
V
V
µA
µA
µA
µA
µA
mA
Input high-level current
Input low-level current
Output off leakage current
Current drain
CCB Output Data Format
• Each block of output data consists of 32 bits (4 bytes), of which 2 bytes are RDS data and 2 bytes are flag data.
• Any number of 32-bit output data blocks can be output consecutively.
• When there is no data that can be read out in the internal memory, the system outputs blocks of all-zero data
consecutively.
• If data readout is interrupted, the next read operation starts with the 32-bit data block whose readout was interrupted.
However, if only the last bit remains to be read, it will not be possible to reread that whole block.
• The check bits (10 bits) are not output.
• To judge whether or not the data is valid, refer to the error information flags E0 to E2, but the offset word detection
flags (OWD) should never be reffered to.
• If the first four-bits are not “1010”, since the readout data is invalid, readout operation must be halted.
CCB address 6C
Output data/first bit
Last bit
(8) RDS data
(7) Error information flags
(6) Synchronization established flag
(5) ARI (SK) detection flag
(4) RAM data remaining flag
(3) Consecutive RAM read out possible flag
(2) Offset word information flag
(1) Offset word detection flag
Fixed pattern (1010)
1. Offset word detection flag (1 bit): OWD
OWD
1
0
Offset word detection
Detected
Not detected (protection function operating)
2. Offset word information flag (3 bits): B0 to B2
B B B
2 1 0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Offset word
A
B
C
C’
D
E
Unused
Unused
No. 5877-5/14
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