EEWORLDEEWORLDEEWORLD

Part Number

Search

74LVT573D

Description
Latches 3.3V OCTAL D TRANS LATCH 3-S
Categorylogic    logic   
File Size912KB,17 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
Download Datasheet Parametric Compare View All

74LVT573D Online Shopping

Suppliers Part Number Price MOQ In stock  
74LVT573D - - View Buy Now

74LVT573D Overview

Latches 3.3V OCTAL D TRANS LATCH 3-S

74LVT573D Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerNXP
Parts packaging codeSOIC
package instructionPLASTIC, SO-20
Contacts20
Reach Compliance Codeunknown
Other featuresBROADSIDE VERSION OF 373
seriesLVT
JESD-30 codeR-PDSO-G20
JESD-609 codee4
length12.8 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeBUS DRIVER
MaximumI(ol)0.032 A
Humidity sensitivity level1
Number of digits8
Number of functions1
Number of ports2
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP20,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Maximum supply current (ICC)12 mA
Prop。Delay @ Nom-Sup4.3 ns
propagation delay (tpd)5.2 ns
Certification statusNot Qualified
Maximum seat height2.65 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyBICMOS
Temperature levelINDUSTRIAL
Terminal surfaceNICKEL PALLADIUM GOLD
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width7.5 mm
Base Number Matches1
74LVT573
3.3 V octal D-type transparent latch; 3-state
Rev. 8 — 22 November 2011
Product data sheet
1. General description
The 74LVT573 is a high-performance BiCMOS product designed for V
CC
operation at
3.3 V. This device is an octal transparent latch coupled to eight 3-state output buffers. The
two sections of the device are controlled independently by Latch Enable (LE) and Output
Enable (OE) control gates. The 74LVT573 has a broadside pinout configuration to
facilitate PC board layout and allow easy interface with microprocessors.
The data on the Dn inputs are transferred to the latch outputs when the Latch Enable (LE)
input is High. The latch remains transparent to the data inputs while LE is High, and stores
the data that is present one setup time before the High-to-Low enable transition.
The 3-state output buffers are designed to drive heavily loaded 3-state buses, MOS
memories, or MOS microprocessors. The active-Low Output Enable (OE) controls all
eight 3-state buffers independent of the latch operation.
When OE is Low, the latched or transparent data appears at the outputs. When OE is
High, the outputs are in the High-impedance “OFF” state, which means they will neither
drive nor load the bus.
2. Features and benefits
Inputs and outputs arranged for easy interfacing to microprocessors
3-state outputs for bus interfacing
Common output enable control
TTL input and output switching levels
Input and output interface capability to systems at 5 V supply
Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
Live insertion and extraction permitted
No bus current loading when output is tied to 5 V bus
Power-up reset
Power-up 3-state
Latch-up protection
JESD78 class II exceeds 500 mA
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from
40 C
to +85
C

74LVT573D Related Products

74LVT573D 74LVT573D-T CMF20200K00JNEK80
Description Latches 3.3V OCTAL D TRANS LATCH 3-S Latches 3.3V OCTAL D TRANS LATCH 3-S Fixed Resistor, Metal Film, 1W, 200000ohm, 500V, 5% +/-Tol, 200ppm/Cel,
Is it Rohs certified? conform to conform to conform to
Reach Compliance Code unknown unknown compliant
series LVT LVT CMF INDUSTRIAL
JESD-609 code e4 e4 e3
Number of terminals 20 20 2
Maximum operating temperature 85 °C 85 °C 175 °C
Minimum operating temperature -40 °C -40 °C -55 °C
Package shape RECTANGULAR RECTANGULAR TUBULAR PACKAGE
Package form SMALL OUTLINE SMALL OUTLINE Axial
technology BICMOS BICMOS METAL FILM
Terminal surface NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD Matte Tin (Sn)
Maker NXP NXP -
Parts packaging code SOIC SOIC -
package instruction PLASTIC, SO-20 SOP, SOP20,.25 -
Contacts 20 20 -
Other features BROADSIDE VERSION OF 373 BROADSIDE VERSION OF 373 -
JESD-30 code R-PDSO-G20 R-PDSO-G20 -
length 12.8 mm 12.8 mm -
Load capacitance (CL) 50 pF 50 pF -
Logic integrated circuit type BUS DRIVER BUS DRIVER -
MaximumI(ol) 0.032 A 0.064 A -
Humidity sensitivity level 1 1 -
Number of digits 8 8 -
Number of functions 1 1 -
Number of ports 2 2 -
Output characteristics 3-STATE 3-STATE -
Output polarity TRUE TRUE -
Package body material PLASTIC/EPOXY PLASTIC/EPOXY -
encapsulated code SOP SOP -
Encapsulate equivalent code SOP20,.4 SOP20,.25 -
Peak Reflow Temperature (Celsius) 260 260 -
power supply 3.3 V 3.3 V -
Maximum supply current (ICC) 12 mA 12 mA -
Prop。Delay @ Nom-Sup 4.3 ns 4.3 ns -
propagation delay (tpd) 5.2 ns 5.2 ns -
Certification status Not Qualified Not Qualified -
Maximum seat height 2.65 mm 2.65 mm -
Maximum supply voltage (Vsup) 3.6 V 3.6 V -
Minimum supply voltage (Vsup) 2.7 V 2.7 V -
Nominal supply voltage (Vsup) 3.3 V 3.3 V -
surface mount YES YES -
Temperature level INDUSTRIAL INDUSTRIAL -
Terminal form GULL WING GULL WING -
Terminal pitch 1.27 mm 1.27 mm -
Terminal location DUAL DUAL -
Maximum time at peak reflow temperature 30 30 -
width 7.5 mm 7.5 mm -
Base Number Matches 1 1 -
method of packing - TAPE AND REEL Bulk
The world's first "wired mobile phone" was successfully developed, freeing both hands
[i=s]This post was last edited by jameswangsynnex on 2015-3-3 19:58[/i] A new technology dedicated to changing the way users make and receive calls on their mobile phones and preventing mobile phones ...
探路者 Mobile and portable
How to reference files in BSP package if they are used in subprojects in PB?
I want to add a driver myself, and then I created a subproject in Subprojects, but now I need to use the files in the bsp driver package. What I did was to add the directory where the header files nee...
jcz100 Embedded System
16-bit AD conversion considerations
[font=微软雅黑][size=3]What should be paid attention to when doing 16-bit AD conversion during PCB wiring? [/size][/font][font=微软雅黑][size=3] [/size][/font] [align=left][color=#000][font=微软雅黑][size=3]1. A ...
模拟IC Analogue and Mixed Signal
Temperature displayed by 12864 and 1820
I would like to share with you the 12864 temperature display I wrote, which is controlled by 18b20....
gaohuating MCU
Introduction to the Xvid Application Programming Interface
Video encoding information...
liulong2007 Embedded System
Design of Low-Power Multi-Channel Data Processing System Based on DSP and CPLD
Abstract: This paper introduces a low-power multi-channel data acquisition and processing system based on DSP and CPLD. The whole system is composed of DSP and CPLD to dynamically set the A/D sampling...
ruheruhe DSP and ARM Processors

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 634  2611  1384  1479  2579  13  53  28  30  52 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号