Features
•
High Performance, Low Power 32-bit AVR
®
Microcontroller
– Compact Single-Cycle RISC Instruction Set Including DSP Instructions
– Read-Modify-Write Instructions and Atomic Bit Manipulation
– Performance
• Up to 61 DMIPS Running at 48MHz from Flash (1 Flash Wait State)
• Up to 34 DMIPS Running at 24MHz from Flash (0 Flash Wait State)
Multi-Hierarchy Bus System
– High-Performance Data Transfers on Separate Buses for Increased Performance
– 7 Peripheral DMA Channels Improve Speed for Peripheral Communication
Internal High-Speed Flash
– 128Kbytes, and 64Kbytes Versions
– Single-Cycle Access up to 24MHz
– Prefetch Buffer Optimizing Instruction Execution at Maximum Speed
– 4ms Page Programming Time and 8ms Full-Chip Erase Time
– 100,000 Write Cycles, 15-year Data Retention Capability
– Flash Security Locks and User Defined Configuration Area
Internal High-Speed SRAM, Single-Cycle Access at Full Speed
– 16Kbytes
Interrupt Controller (INTC)
– Autovectored Low Latency Interrupt Service with Programmable Priority
External Interrupt Controller (EIC)
System Functions
– Power and Clock Manager
– SleepWalking
™
Power Saving Control
– Internal System RC Oscillator (RCSYS)
– 32 KHz Oscillator
– Clock Failure Detection
– One Multipurpose Oscillator and two Phase Locked Loop (PLL)
Windowed Watchdog Timer (WDT)
Asynchronous Timer (AST) with Real-Time Clock Capability
– Counter or Calendar Mode Supported
Frequency Meter (FREQM) for Accurate Measuring of Clock Frequency
Universal Serial Bus (USB)
– Device 2.0 full speed and low speed
– Flexible End-Point Configuration and Management
– On-chip Transceivers Including Pull-Ups
Three 16-bit Timer/Counter (TC) Channels
– External Clock Inputs, PWM, Capture and Various Counting Capabilities
7 PWM Channels (PWMA)
– 12-bit PWM up to 150MHz Source Clock
Three Universal Synchronous/Asynchronous Receiver/Transmitters (USART)
– Independent Baudrate Generator, Support for SPI
– Support for Hardware Handshaking
One Master/Slave Serial Peripheral Interfaces (SPI) with Chip Select Signals
– Up to 15 SPI Slaves can be Addressed
•
•
32-bit AVR
®
Microcontroller
ATUC128D3
ATUC64D3
ATUC128D4
ATUC64D4
•
•
•
•
•
•
•
•
•
•
•
•
32133D–11/2011
UC3D
•
•
•
•
One Master and One Slave Two-Wire Interfaces (TWI), 400kbit/s I
2
C-compatible
One 8-channel Analog-To-Digital Converter (ADC)
One Inter-IC Sound Controller (IISC) with Stereo Capabilities
Autonomous Capacitive Touch Button (QTouch
®
) Capture
– Up to 25 Touch Buttons
– QWheel
®
and QSlide
®
Compatible
QTouch
®
Library Support
– Capacitive Touch Buttons, Sliders, and Wheels
– QTouch
®
and QMatrix
®
Acquisition
– Hardware assisted QTouch
®
Acquisition
One Programmable Glue Logic Controller(GLOC) for General Purpose PCB Design
On-Chip Non-Intrusive Debug System
– Nexus Class 2+, Runtime Control
– aWire
™
Single-Pin Programming and Debug Interface Muxed with Reset Pin
– 64-pin and 48-pin TQFP/QFN (51 and 35 GPIO Pins)
Four High-Drive I/O Pins
Single 3.3V Power Supply or Dual 1.8V-3.3V Power Supply
•
•
•
•
•
2
32133D–11/2011
UC3D
1. Description
The UC3D is a complete System-On-Chip microcontroller based on the AVR32UC RISC proces-
sor running at frequencies up to 48 MHz. AVR32UC is a high-performance 32-bit RISC
microprocessor core, designed for cost-sensitive embedded applications, with particular empha-
sis on low power consumption, high code density, and high performance.
The processor implements a fast and flexible interrupt controller for supporting modern operat-
ing systems and real-time operating systems.
Higher computation capability is achieved using a rich set of DSP instructions.
The Peripheral Direct Memory Access (DMA) controller enables data transfers between periph-
erals and memories without processor involvement. The Peripheral DMA controller drastically
reduces processing overhead when transferring continuous and large data streams.
The Power Manager improves design flexibility and security. Power monitoring is supported by
on-chip Power-On Reset (POR), and Brown-Out Detector (BOD). The device features several
oscillators, such as Oscillator 0 (OSC0), 32 KHz Oscillator and system RC oscillator (RCSYS),
and two Phase Lock Loop (PLL). Either of these oscillators/PLLs can be used as source for the
system clock.
The Watchdog Timer (WDT) will reset the device unless it is periodically serviced by the soft-
ware. This allows the device to recover from a condition that has caused the system to be
unstable.
The Asynchronous Timer (AST) combined with the 32KHz crystal oscillator supports powerful
real-time clock capabilities, with a maximum timeout of up to 136 years. The AST can operate in
counter mode or calendar mode. The 32KHz crystal oscillator can operate in a 1- or 2-pin mode,
trading pin usage and accuracy.
The Frequency Meter (FREQM) allows accurate measuring of a clock frequency by comparing it
to a known reference clock.
The Full-Speed USB 2.0 Device interface supports several USB Classes at the same time
thanks to the rich End-Point configuration.
The device includes three identical 16-bit Timer/Counter (TC) channels. Each channel can be
independently programmed to perform frequency measurement, event counting, interval mea-
surement, pulse generation, delay timing, and pulse width modulation.
The Pulse Width Modulation controller (PWMA) provides 12-bit PWM channels which can be
synchronized and controlled from a common timer. Seven PWM channels are available,
enabling applications that require multiple PWM outputs, such as LCD backlight control. The
PWM channels can operate independently, with duty cycles set independently from each other,
or in interlinked mode, with multiple channels changed at the same time.
The UC3D also features many communication interfaces for communication intensive applica-
tions. In addition to standard serial interfaces like USART, SPI or TWI, USB is available. The
USART supports different communication modes, like SPI mode.
A general purpose 8-channel ADC is provided; It features a fully configurable sequencer that
handles many conversions. Window Mode allows each ADC channel to be used like a simple
Analog Comparator.
The Inter-IC Sound controller (IISC) provides easy access to digital audio interfaces following
I2S stereo standard.
3
32133D–11/2011
UC3D
The Capacitive Touch (CAT) module senses touch on external capacitive touch sensors, using
the QTouch
®
technology. Capacitive touch sensors use no external mechanical components,
unlike normal push buttons, and therefore demand less maintenance in the user application.
The CAT module allows up to 25 touch sensors. One touch sensor can be configured to operate
autonomously without software interaction,allowing wakeup from sleep modes when activated.
Atmel also offers the QTouch library for embedding capacitive touch buttons, sliders, and
wheels functionality into AVR microcontrollers. The patented charge-transfer signal acquisition
offers robust sensing and included fully debounced reporting of touch keys and includes Adja-
cent Key Suppression
®
(AKS
®
) technology for unambiguous detection of key events. The easy-
to-use QTouch Suite toolchain allows you to explore, develop, and debug your own touch
applications.
The UC3D integrates a class 2+ Nexus 2.0 On-Chip Debug (OCD) System, with full-speed
read/write memory access, in addition to basic runtime control. The single-pin aWire interface
allows all features available through the JTAG interface to be accessed through the RESET pin,
allowing the JTAG pins to be used for GPIO or peripherals.
4
32133D–11/2011
UC3D
2. Overview
2.1
Block Diagram
Figure 2-1.
Block Diagram
JTAG
INTERFACE
MEMORY INTERFACE
TCK
TDO
TDI
TMS
DATAOUT
RESET_N
LOCAL BUS
INTERFACE
LOCAL BUS
aWire
NEXUS
CLASS 2+
OCD
UC CPU
INSTR
INTERFACE
DATA
INTERFACE
16KB SRAM
M
DP
DM
VBUS
M
M
S
FLASH
CONTROLLER
64/128KB
FLASH
USB FS
CONTROLLER
M
HIGH SPEED
BUS MATRIX
S
M
S
CONFIGURATION
S
REGISTERS BUS
HSB-PB
BRIDGE B
HSB-PB
BRIDGE A
PERIPHERAL
DMA
CONTROLLER
GENERALPURPOSE I/Os
POWER MANAGER
CLOCK
CONTROLLER
SLEEP
CONTROLLER
DMA
DMA
PA
PB
USART0
USART1
USART2
RXD
TXD
CLK
RTS, CTS
SCK
RESET
CONTROLLER
SPI
MISO, MOSI
NPCS[3..0]
DMA
RCSYS
RC120M
XIN32
XOUT32
XIN0
XOUT0
DMA
TWD
TWCK
GENERAL PURPOSE I/Os
GCLK[2..0]
TWI MASTER
TWCK
OSC32K
OSC0
PLL0
PLL1
BOD
SYSTEM CONTROL
INTERFACE
TWI SLAVE
TWD
PA
PB
8-CHANNEL ADC
INTERFACE
DMA
AD[7..0]
ADVREF
DOUT
DIN
FSYNC
CLK
MCLK
CSA[24..0]
CSB[24..0]
EXTINT[8..1]
NMI
EXTERNAL INTERRUPT
CONTROLLER
ASYNCHRONOUS
TIMER
WATCHDOG
TIMER
FREQUENCY METER
DMA
DMA
INTERRUPT
CONTROLLER
INTER-IC SOUND
CONTROLLER
CAPACITIVE TOUCH
SENSOR
CONTROLLER
A[2..0]
TIMER/COUNTER
B[2..0]
CLK[2..0]
PWM[6..0]
PWM CONTROLLER
GLUE LOGIC
CONTROLLER
OUT[3:0]
IN[15..0]
5
32133D–11/2011
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