NCV7441D20G datasheet, PDF - EEWORLD Datasheet

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NCV7441D20G: DescriptionCAN Interface IC DUAL HS LP CAN TRANSC.; CategoryWireless rf/communication Telecom circuit; File Size167KB，10 Pages; ManufacturerON Semiconductor; Websitehttp://www.onsemi.cn; Environmental Compliance

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NCV7441D20G Overview

CAN Interface IC DUAL HS LP CAN TRANSC.

NCV7441D20G Parametric

Parameter Name	Attribute value
Brand Name	ON Semiconductor
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	ON Semiconductor
Parts packaging code	SOIC
package instruction	SOP,
Contacts	14
Manufacturer packaging code	751AP
Reach Compliance Code	compliant
ECCN code	EAR99
Factory Lead Time	1 week
Samacsys Description	ON Semiconductor NCV7441D20G, CAN Transceiver 1Mbit/s 2-channel ISO 11898, ISO 11898-2, ISO 11898-5, SAE J2284, 14-Pin
JESD-30 code	R-PDSO-G14
JESD-609 code	e3
length	8.65 mm
Humidity sensitivity level	2
Number of functions	1
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Maximum seat height	1.75 mm
Nominal supply voltage	5 V
surface mount	YES
Telecom integrated circuit types	INTERFACE CIRCUIT
Temperature level	AUTOMOTIVE
Terminal surface	Tin (Sn)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	3.9 mm

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NCV7441

Dual High Speed Low

Power CAN Transceiver

The NCV7441, dual CAN transceiver offers two fully independent

high−speed CAN transceivers which can be individually connected to

two CAN protocol controllers. The CAN channels can be separately

put to normal or to standby mode, in which remote wakeup detection

from the bus is possible.

Due to the shared auxiliary circuitry and common package, this

circuit version can replace two standard high−speed CAN transceivers

while saving board space.

Features

SOIC−14 NB

CASE 751A

XXXXX

http://onsemi.com

MARKING

DIAGRAM

NCV7441−0

AWLYWWG

•

Compatible with the ISO 11898 Standard (ISO 11898−2, ISO

•

11898−5 and SAE J2284)

Low Quiescent Current

High Speed (up to 1 Mbps)

Ideally Suited for 12 V and 24 V Industrial and Automotive

Applications

Extremely Low Current Standby Mode with Wakeup Via the Bus

Low EME without Common−mode Choke

No Disturbance of the Bus Lines with an Un−powered Node

Predictable Behavior Under All Supply Circumstances

Transmit Data (TxD) Dominant Time−out Function

Thermal Protection

Bus Pins Protected Against Transients in an Automotive

Environment

Power Down Mode in Which the Transmitter is Disabled

Bus and V

SPLIT

Pins Short Circuit Proof to Supply Voltage and

Ground

Input Logic Levels Compatible with 3.3 V Devices

Up to 110 Nodes can be Connected to the Same Bus in Function of

Topology

Pb−Free Packages are Available

= Specific Device Code

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

PIN CONNECTIONS

TxD1

RxD1

GND

VCC

GND

RxD2

TxD2

Dual CAN

NCV7441

STB1

CANH1

CANL1

TEST/GND

CANH2

CANL2

STB2

Typical Applications

•

Automotive

•

Industrial Networks

ORDERING INFORMATION

See detailed ordering and shipping information in the

package dimensions section on page 9 of this data sheet.

Semiconductor Components Industries, LLC, 2011

August, 2011

−

Rev. 0

Publication Order Number:

NCV7441/D

NCV7441

If the main power supply V

(nominal 5 V) is above its under−voltage (V

CC_UV

) level, each CAN channel can enter either

normal mode (when the corresponding STB1/2 digital input is pulled Low) or standby mode (when the corresponding STB1/2

signal is left High):

•

In the normal mode:

♦

The bus transceiver is ready to transmit and receive CAN bus signals with the full CAN communication speed (up to

1 Mbps) and thus interconnect the CAN bus with the corresponding CAN controller through digital pins TxD1/2 and

RxD1/2

♦

The bus pins are internally biased to typically V

/2 through the input circuitry

♦

TxD1/2 input pin is monitored by a timeout in order to prevent a permanent dominant being forced to the bus thus

preventing other nodes from communicating. If TxD1/2 is Low for longer than t

cnt(timeout)

, the transmitter switches

back to recessive. Only when TxD1/2 returns to High, the timeout counter is reset and the transmitter is ready to

transmit dominant symbols again. The TxD1/2 timeout protection is implemented individually for both CAN

transceivers.

♦

A common thermal monitoring circuit compares the circuit junction temperatures with threshold T

J(sd)

. If the thermal

shutdown level is exceeded, dominant transmission is disabled. The circuit remains biased and ready to transmit but

the logical path from TxD1/2 pin(s) is blocked. The transmission is again enabled when the junction temperature

decreases below the shutdown level and the TxD1/2 pin returns to the High level, thus avoiding thermal oscillations.

•

In the standby mode:

♦

The respective transmitter is disabled and the current consumption of the channel is fundamentally reduced. Only the

low−power receiver on the channel remains active in order to detect potential CAN bus wakeups. The logical signal

on TxD1/2 input is ignored.

♦

The bus pins are biased to GND through the input circuitry

♦

Digital output RxD1/2 signals the output of the low−power receiver and can be used as a wakeup signal in the

application. A filtering time

BUS

is applied between the bus activity and the RxD1/2 signal in order to ensure that

only sufficiently long dominant signals on the bus will be propagated to the digital output. In addition, dominant bus

signals are ignored in case they were present during normal−to−standby mode transition; in this way unwanted

wakeups are avoided in case of permanent dominant failure on the bus. Example waveforms illustrating bus activity

detection in standby mode are shown in Figure 3.

In order to ensure a safe device state, the digital inputs STB1/2 and TxD1/2 are connected through internal pull−up resistors

to V

thus ensuring that both channels remain in standby mode and/or no dominant can be transmitted in case any of the digital

inputs gets disconnected.

STB1

< t

dbus

< t

dbus

CANH/L1

RxD1

STB2

< t

dbus

CANH/L2

RxD2

PD20100209.08

Figure 3. NCV7441 Dual CAN: Bus Activity Detection in Standby Mode

http://onsemi.com

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