M74HC161
SYNCHRONOUS PRESETTABLE 4-BIT COUNTER
s
s
s
s
s
s
s
HIGH SPEED :
f
MAX
= 62 MHz (TYP.) at V
CC
= 6V
LOW POWER DISSIPATION:
I
CC
=4µA(MAX.) at T
A
=25°C
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 4mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
WIDE OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 6V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 161
DIP
SOP
ORDER CODES
PACKAGE
DIP
SOP
TSSOP
TUBE
DESCRIPTION
The M74HC161 is an high speed CMOS
SYNCHRONOUS
4-BIT
BINARY
PRESETTABLE COUNTER fabricated with silicon
gate C
2
MOS technology.
The CLOCK input is active on the rising edge.
Both LOAD and CLEAR inputs are active LOW.
Presetting is synchronous on the rising edge of
the clock, the function is cleared asynchronously.
bs
O
et
l
o
ro
P
e
uc
d
s)
t(
O
-
Two enable inputs (TE and PE) and CARRY
output are provided to enable easy cascading of
counters, which facilities easy implementation of
N-bit counters without using external gates.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
so
b
te
le
M74HC161B1R
M74HC161M1R
ro
P
uc
d
s)
t(
TSSOP
T&R
M74HC161RM13TR
M74HC161TTR
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
1/12
M74HC161
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
1
2
3, 4, 5, 6
7
10
9
14, 13, 12,
11
15
8
16
SYMBOL
CLEAR
CLOCK
A, B, C, D
PE
TE
LOAD
QA to QD
CARRY
GND
Vcc
NAME AND FUNCTION
Asynchronous Master
Reset
Clock Input (LOW to
HIGH, Edge-triggered)
Data Inputs
Count Enable Input
Count Enable Carry Input
Parallel Enable Input
Flip Flop Outputs
Terminal Count Output
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
INPUTS
CLEAR
L
H
H
H
H
H
LOAD
X
L
H
H
H
X
PE
X
X
X
L
H
X
TE
X
X
L
X
CLOCK
X
QA
L
A
OUTPUTS
QB
L
X : Don’t Care
A, B, C, D : Logic level of data inputs
Carry : CARRY = TE·Q
A
·Q
B
·Q
C
·Q
D
LOGIC DIAGRAM
bs
O
et
l
o
ro
P
e
uc
d
H
X
s)
t(
O
-
so
b
B
QC
L
te
le
ro
P
uc
d
s)
t(
FUNCTION
RESET TO "0"
PRESET DATA
NO COUNT
NO COUNT
COUNT
NO COUNT
QD
L
C
D
NO CHANGE
NO CHANGE
COUNT UP
NO CHANGE
This logic diagram has not be used to estimate propagation delays
2/12
M74HC161
TIMING CHART
ABSOLUTE MAXIMUM RATINGS
Symbol
b
O
et
l
so
V
I
V
O
I
IK
I
O
I
OK
T
stg
T
L
V
CC
Supply Voltage
DC Input Voltage
DC Output Voltage
ro
P
e
uc
d
s)
t(
O
-
so
b
te
le
ro
P
uc
d
s)
t(
Parameter
Value
-0.5 to +7
-0.5 to V
CC
+ 0.5
-0.5 to V
CC
+ 0.5
±
20
±
20
±
25
±
50
500(*)
-65 to +150
300
Unit
V
V
V
mA
mA
mA
mA
mW
°C
°C
DC Input Diode Current
DC Output Diode Current
DC Output Current
I
CC
or I
GND
DC V
CC
or Ground Current
P
D
Power Dissipation
Storage Temperature
Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65
°
C; derate to 300mW by 10mW/
°
C from 65
°
C to 85
°
C
3/12
ADI Reference Circuit
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