Features
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Supply Voltage 4.5V to 5.5V
•
Operating Temperature Range –40°C to +85°C
•
Minimal External Circuitry Requirements, No RF Components on the PC Board Except
•
•
•
•
•
•
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•
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Matching to the Receiver Antenna
High Sensitivity, Especially at Low Data Rates
Sensitivity Reduction Possible Even While Receiving
Fully Integrated VCO
Low Power Consumption Due to Configurable Self-polling with a Programmable Time
Frame Check
Single-ended RF Input for Easy Matching to
λ
/ 4 Antenna or Printed Antenna on PCB
Low-cost Solution Due to High Integration Level
ESD Protection According to MIL-STD 883 (4 KV HBM) Except Pin POUT (2 KV HBM)
High Image Frequency Suppression Due to 1 MHz IF in Conjunction With a SAW
Front-end Filter. Up to 40 dB is Thereby Achievable With Newer SAWs
Programmable Output Port for Sensitivity Selection or for Controlling External
Periphery
Communication to the Microcontroller Possible via a Single, Bi-directional Data Line
Power Management (Polling) is also Possible by Means of a Separate Pin via the
Microcontroller
UHF ASK/FSK
Receiver
ATA3745
1. Description
The ATA3745 is a multi-chip PLL receiver device supplied in an SO20 package. It has
been specially developed for the demands of RF low-cost data transmission systems
with low data rates from 1 kBaud to 10 kBaud in Manchester or Bi-phase code. The
receiver is well-suited to operate with Atmel’s PLL RF transmitter ATA2745. It can be
used in the frequency receiving range of f
0
= 310 MHz to 440 MHz for ASK data trans-
mission. All the statements made below refer to 433.92 MHz and 315 MHz
applications.
The main applications of the ATA3745 are in the areas of outside temperature meter-
ing, socket control, garage door openers, consumption metering, light/fan or
air-conditioning control, jalousies, wireless keyboards, and various other consumer
market applications.
4901B–RKE–11/07
Figure 1-1.
System Block Diagram
UHF ASK/FSK
Remote control transmitter
UHF ASK/FSK
Remote control receiver
ATA3745
Demod
Encoder
ATARx9x
PLL
Antenna
XTO
VCO
Antenna
PLL
XTO
Data
Interf.
1 to 3
Micro-
controller
1 Li cell
ATA2745
Keys
Power
amp.
LNA
VCO
Figure 1-2.
Block Diagram
V
S
ASK
CDEM
AVCC
Demodulator
and Data Filter
Dem_out
50 kΩ
DATA
RSSI
Limiter out
ENABLE
IF Amp
Sensitivity
reduction
Polling circuit
and
control logic
TEST
POUT
AGND
MODE
DGND
4th Order
FE
CLK
DVCC
LPF
3 MHz
MIXVCC
Standby
Logic
LFGND
LNAGND
IF Amp
LFVCC
LPF
3 MHz
VCO
XTO
XTO
f
LNA_IN
LNA
:64
LF
2
ATA3745
4901B–RKE–11/07
ATA3745
2. Pin Configuration
Figure 2-1.
Pinning SO20
NC
ASK
CDEM
AVCC
AGND
DGND
MIXVCC
LNAGND
LNA_IN
NC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DATA
ENABLE
TEST
POUT
MODE
DVCC
XTO
LFGND
LF
LFVCC
Table 2-1.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin Description
Symbol
NC
ASK
CDEM
AVCC
AGND
DGND
MIXVCC
LNAGND
LNA_IN
NC
LFVCC
LF
LFGND
XTO
DVCC
MODE
POUT
TEST
ENABLE
DATA
Function
Not connected
ASK high
Lower cut-off frequency data filter
Analog power supply
Analog ground
Digital ground
Power supply mixer
High-frequency ground LNA and mixer
RF input
Not connected
Power supply VCO
Loop filter
Ground VCO
Crystal oscillator
Digital power supply
Selecting 433.92 MHz/315 MHz. Low: 4.90625 MHz (USA), High: 6.76438 MHz (Europe)
Programmable output port
Test pin, during operation at GND
Enables the polling mode. Low: polling mode off (sleep mode). High: polling mode on (active mode)
Data output/configuration input
3
4901B–RKE–11/07
3. RF Front End
The RF front end of the receiver is a heterodyne configuration that converts the input signal
into a 1-MHz IF signal. As shown in the block diagram, the front end consists of an LNA (low
noise amplifier), LO (local oscillator), a mixer and an RF amplifier.
The LO generates the carrier frequency for the mixer via a PLL synthesizer. The XTO (crystal
oscillator) generates the reference frequency f
XTO
. The VCO (voltage-controlled oscillator)
generates the drive voltage frequency f
LO
for the mixer. f
LO
is dependent on the voltage at pin
LF. f
LO
is divided by a factor of 64. The divided frequency is compared to f
XTO
by the phase fre-
quency detector. The current output of the phase frequency detector is connected to a passive
loop filter and thereby generates the control voltage V
LF
for the VCO. By means of that config-
uration, V
LF
is controlled such that f
LO
/ 64 is equal to f
XTO
. If f
LO
is determined, f
XTO
can be
calculated using the following formula:
f
LO
-
f
XTO
= -------
64
The XTO is a one-pin oscillator that operates at the series resonance of the quartz crystal.
Fig-
ure 3-1shows
the proper layout, with the crystal connected to GND via a capacitor CL. The
value of that capacitor is recommended by the crystal supplier. The value of CL should be opti-
mized for the individual board layout to achieve the exact value of f
XTO
and thereby of f
LO
.
When designing the system in terms of receiving bandwidth, the accuracy of the crystal and
XTO must be considered.
Figure 3-1.
PLL Peripherals
DVCC
XTO
LFGND
LF
LFVCC
V
S
R
1
820Ω
V
S
C
L
C
9
4.7 nF
C
10
1 nF
The passive loop filter connected to pin LF is designed for a loop bandwidth of
B
Loop
= 100 kHz. This value for B
Loop
exhibits the best possible noise performance of the LO.
Figure 3-1
shows the appropriate loop filter components to achieve the desired loop band-
width. If the filter components are changed for any reason, please note that the maximum
capacitive load at pin LF is limited. If the capacitive load is exceeded, a bit check may no
longer be possible since f
LO
cannot settle in time before the bit check starts to evaluate the
incoming data stream. Therefore, self polling also does not work in that case.
f
LO
is determined by the RF input frequency f
RF
and the IF frequency f
IF
using the following for-
mula:
f
LO
= f
RF
–
f
IF
4
ATA3745
4901B–RKE–11/07
ATA3745
To determine f
LO
, the construction of the IF filter must be considered at this point. The nominal
IF frequency is f
IF
= 1 MHz. To achieve a good accuracy of the filter’s corner frequencies, the
filter is tuned by the crystal frequency f
XTO
. This means that there is a fixed relation between f
IF
and f
LO
that depends on the logic level at pin MODE. This is described by the following formu-
las:
f
LO
-
MODE
=
0 (USA) f
IF
= ---------
314
f
LO
MODE
=
1 (Europe) f
IF
= -----------------
-
432.92
The relation is designed to achieve the nominal IF frequency of f
IF
= 1 MHz for most applica-
tions. For applications where f
RF
= 315 MHz, the MODE must be set to “0”. In the case of
f
RF
= 433.92 MHz, the MODE must be set to “1”. For other RF frequencies, f
IF
is not equal to
1 MHz. f
IF
is then dependent on the logical level at pin MODE and on f
RF
.
Table 3-1
summa-
rizes the different conditions.
The RF input either from an antenna or from a generator must be transformed to the RF input
pin LNA_IN. The input impedance of that pin is provided in the electrical parameters. The par-
asitic board inductances and capacitances also influence the input matching. The RF receiver
ATA3745 exhibits its highest sensitivity at the best signal-to-noise ratio (SNR) in the LNA.
Hence, noise matching is the best choice for designing the transformation network.
A good practice when designing the network is to start with power matching. From that starting
point, the values of the components can be varied to some extent to achieve the best
sensitivity.
If a SAW is implemented into the input network, a mirror frequency suppression of
∆P
Ref
= 40 dB can be achieved. There are SAWs available that exhibit a notch at
∆f
= 2 MHz.
These SAWs work best for an intermediate frequency of IF = 1 MHz. The selectivity of the
receiver is also improved by using a SAW. In typical automotive applications, a SAW is used.
Figure 3-2 on page 6
shows a typical input matching network for f
RF
= 315 MHz and
f
RF
= 433.92 MHz using a SAW.
Figure 3-3 on page 6
illustrates an input matching to 50Ω
without a SAW. The input matching networks shown in
Figure 3-3 on page 6
are the reference
networks for the parameters given in the section
“Electrical Characteristics” on page 23.
Table 3-1.
Conditions
Calculation of LO and IF Frequency
Local Oscillator
Frequency
f
LO
= 314 MHz
f
LO
= 432.92 MHz
f
RF
f
LO
= -------------------
1
-
1
+ ---------
314
f
RF
-
f
LO
= ---------------------------
1
-
1
+ -----------------
432.92
Intermediate Frequency
f
IF
= 1 MHz
f
IF
= 1 MHz
f
RF
= 315 MHz, MODE = 0
f
RF
= 433.92 MHz, MODE = 1
300 MHz < f
RF
< 365 MHz, MODE =
0
f
LO
f
IF
= ---------
-
314
365 MHz < f
RF
< 450 MHz, MODE =
1
f
LO
-
f
IF
= -----------------
432.92
5
4901B–RKE–11/07
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