EEWORLDEEWORLDEEWORLD

Part Number

Search

NB100LVEP224FAG

Description
Clock Drivers & Distribution 2.5V/3.3V 1:24 Diff HSTL/ECL/PECL Driver
Categorysemiconductor    Analog mixed-signal IC   
File Size113KB,10 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
Download Datasheet Parametric View All

NB100LVEP224FAG Online Shopping

Suppliers Part Number Price MOQ In stock  
NB100LVEP224FAG - - View Buy Now

NB100LVEP224FAG Overview

Clock Drivers & Distribution 2.5V/3.3V 1:24 Diff HSTL/ECL/PECL Driver

NB100LVEP224FAG Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerON Semiconductor
Product CategoryClock Drivers & Distribution
RoHSDetails
Multiply / Divide Factor1:24
Output TypeECL
Max Output Freq1 GHz
Supply Voltage - Max3.8 V
Supply Voltage - Min2.375 V
Minimum Operating Temperature- 40 C
Maximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT
Package / CaseLQFP-64 EP
PackagingTray
Height1.45 mm
Input TypeLVECL, LVPECL
Length10 mm
TypeECL, LVDS, PECL
Width10 mm
Moisture SensitiveYes
Operating Supply Current165 mA
Factory Pack Quantity160
NB100LVEP224
2.5V/3.3V 2:1:24 Differential
ECL/PECL Clock Driver with
Clock Select and Output
Enable
http://onsemi.com
Description
The NB100LVEP224 is a low skew 2:1:24 differential clock driver,
designed with clock distribution in mind, accepting two clock sources
into an input multiplexer. The part is designed for use in low voltage
applications which require a large number of outputs to drive precisely
aligned low skew signals to their destination. The two clock inputs are
differential ECL/PECL and they are selected by the CLK_SEL pin. To
avoid generation of a runt clock pulse when the device is
enabled/disabled, the Output Enable (OE) is synchronous ensuring the
outputs will only be enabled/disabled when they are already in LOW
state (See Figure 4).
The NB100LVEP224 guarantees low output−to−output skew. The
optimal design, layout, and processing minimize skew within a device
and from lot to lot. In any differential output, the same bias and
termination scheme is required. Unused output pairs should be left
unterminated (open) to “reduce power and switching noise as much as
possible.” Any unused single line of a differential pair should be
terminated the same as the used line to maintain balanced loads on the
differential driver outputs. The wide VIHCMR specification allows
both pair of CLOCK inputs to accept LVDS levels.
The NB100LVEP224, as with most other ECL devices, can be
operated from a positive V
CC
supply in LVPECL mode. This allows
the LVEP224 to be used for high performance clock distribution in
+3.3 V or +2.5 V systems. Single−ended CLK input operation is
limited to a V
CC
3.0 V in LVPECL mode, or V
EE
−3.0 V in NECL
mode. In a PECL environment, series or Thevenin line terminations
are typically used as they require no additional power supplies. For
more information on PECL terminations, designers should refer to
Application Note AND8020/D.
Features
MARKING
DIAGRAM*
LQFP−64
FA SUFFIX
CASE 848G
A
WL
YY
WW
G
NB100
LVEP224
AWLYYWWG
64
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
20 ps Typical Output−to−Output Skew
75 ps Typical Device−to−Device Skew
Maximum Frequency > 1 GHz
650 ps Typical Propagation Delay
LVPECL Mode Operating Range:
V
CC
= 2.375 V to 3.8 V with V
EE
= 0 V
NECL Mode Operating Range:
V
CC
= 0 V with V
EE
= −2.375 V to −3.8 V
Internal Input Pulldown Resistors
Q Output will Default Low with Inputs Open or at V
EE
Thermally Enhanced 64−Lead LQFP
CLOCK Inputs are LVDS−Compatible; Requires
External 100
W
LVDS Termination Resistor
These are Pb−Free Devices*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2014
1
June, 2014 − Rev. 9
Publication Order Number:
NB100LVEP224/D
How to solve the problem of abnormal heating of op amp THS4052ID
AD5621+THS4052ID expects the output voltage range to be -10V to +5V. During debugging, the +-12V current of the op amp is about 10mA, which is basically normal, but the THS4052ID is abnormally hot, ve...
yshldq114 Analog electronics
FPGA burned-in program does not execute immediately
[i=s] This post was last edited by 3008202060 on 2014-7-17 15:20 [/i] I burned a program into the FPGA, but it took about a minute to start executing. Why is this? There is no delay in the program! Pl...
3008202060 FPGA/CPLD
Desktop power supply 12V output power
I have a desktop power supply and I want to use the 12V power supply. I don't know what the power is? Can anyone tell me about it?...
白丁 Power technology
Getting Started Tutorial: Using the ZUEC3 Debug Tool (USB Debug Adapter/U-EC3/U-EC5) in Keil μVsion3
[url=http://www.zhlab.cn/technique/T0000011.htm][color=#800080]http://www.zhlab.cn/technique/T0000011.htm[/color][/url]...
l456789 MCU
IAR batch code back
Maybe the wording is not accurate. I remember that KEIL had a function to move all selected codes back by the distance of a TAB key. I wonder if IAR has this function?...
zmsxhy Microcontroller MCU
[Home Smart Lighting Control and Indoor Environment Monitoring System]--5. [RSL10] Bluetooth BLE Host Computer Development 1
I had never been involved in Bluetooth BLE development before, so I searched for some information online; In such a short time, it is difficult to fully understand BLE development, whether using Andro...
传媒学子 onsemi and Avnet IoT Innovation Design Competition

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1144  78  536  969  1986  24  2  11  20  40 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号