EEWORLDEEWORLDEEWORLD

Part Number

Search

8N3QV01LG-0024CDI

Description
Programmable Oscillators
CategoryPassive components   
File Size200KB,23 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

8N3QV01LG-0024CDI Online Shopping

Suppliers Part Number Price MOQ In stock  
8N3QV01LG-0024CDI - - View Buy Now

8N3QV01LG-0024CDI Overview

Programmable Oscillators

8N3QV01LG-0024CDI Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerIDT (Integrated Device Technology)
Product CategoryProgrammable Oscillators
ProductVCXO
Quad-Frequency Programmable
VCXO
IDT8N3QV01 Rev G
DATA SHEET
General Description
The IDT8N3QV01 is a Quad-Frequency Programmable VCXO with
very flexible frequency and pull-range programming capabilities.
The device uses IDT’s fourth generation FemtoClock® NG
technology for an optimum of high clock frequency and low phase
noise performance. The device accepts 2.5V or 3.3V supply and is
packaged in a small, lead-free (RoHS 6) 10-lead Ceramic 5mm x
7mm x 1.55mm package.
Besides the 4 default power-up frequencies set by the FSEL0 and
FSEL1 pins, the IDT8N3QV01 can be programmed via the I
2
C
interface to any output clock frequency between 15.476MHz to
866.67MHz and from 975MHz to 1,300MHz to a very high degree of
precision with a frequency step size of 435.9Hz ÷N (N is the PLL
output divider). Since the FSEL0 and FSEL1 pins are mapped to 4
independent PLL M and N divider registers (P, MINT, MFRAC and
N), reprogramming those registers to other frequencies under
control of FSEL0 and FSEL1 is supported. The extended
temperature range supports wireless infrastructure, tele-
communication and networking end equipment requirements. The
device is a member of the high-performance clock family from IDT.
Features
Fourth generation FemtoClock® NG technology
Programmable clock output frequency from 15.476MHz to
866.67MHz and from 975MHz to 1,300MHz
Four power-up default frequencies (see part number order
codes), reprogrammable by I
2
C
I
2
C programming interface for the output clock frequency, APR
and internal PLL control registers
Frequency programming resolution is 435.9Hz ÷N
Absolute pull-range (APR) programmable from ±4.5 to
±754.5ppm
One 2.5V or 3.3V LVPECL differential clock output
Two control inputs for the power-up default frequency
LVCMOS/LVTTL compatible control inputs
RMS phase jitter @ 156.25MHz (12kHz - 20MHz):
0.487ps (typical)
RMS phase jitter @ 156.25MHz (1kHz - 40MHz):
0.614ps (typical)
2.5V or 3.3V supply voltage modes
-40°C to 85°C ambient operating temperature
Available in Lead-free (RoHS 6) package
Block Diagram
OSC
114.285 MHz
÷MINT,
MFRAC
2
VC
FSEL1
FSEL0
SCLK
SDATA
OE
Pulldown
Pulldown
Pullup
Pullup
Pullup
Pin Assignment
÷P
PFD
&
LPF
FemtoClock® NG
VCO
1950-2600MHz
÷N
Q
nQ
SDATA
SCLK
10
VC 1
OE 2
V
EE
3
4
FSEL0
9
8
7
V
CC
nQ
Q
5
6
A/D
7
25
Configuration Register (ROM)
(Frequency, APR, Polarity)
I
2
C Control
7
IDT8N3QV01 Rev G
10-lead Ceramic 5mm x 7mm x 1.55mm
package body
CD Package
Top View
IDT8N3QV01GCD REVISION A
MARCH 6, 2012
1
©2012 Integrated Device Technology, Inc.
FSEL1
Tieto Recruitment: Embedded Software Engineer
Tieto (formerly Diyitong) Information Technology Co., Ltd. (Tieto), founded in 1968, is a Nordic wholly foreign-owned group company engaged in software solutions, listed on the Helsinki and Stockholm ...
xiao_lili0 Recruitment
Remote upgrade of HuaDa MCU HC32L110
Usually, when implementing the IAP function, two project codes need to be written when designing the firmware program. The first project program, namely the BOOT program, does not perform normal funct...
deepskin1213 Domestic Chip Exchange
Half of the computer monitor is black, please help me
Dear experts, my desktop monitor boots up normally, but after a while the upper half of the screen becomes black, while the lower half is normal. I don't know what the problem is. Please give me some ...
cd001 Embedded System
Allegro SPB 16.5 version PCB drawing board quick course
[i=s]This post was last edited by 飞的鹰 on 2020-11-23 22:19[/i]This tutorial is easy to use and explains the cadence spb 16.5 version PCB design process very clearly. The document is very practical!...
已飞的鹰 PCB Design
High Power LED Product Market Report
High Power LED Product Market Report Features Long operating life More Energy Efficient than incandescent and most halogen lamps Low forward voltage operated Instant light (less than 100 ns ) No UV Ty...
youweixing FPGA/CPLD
Analysis of the meaning of commonly used capacitors in different circuits
[p=30, null, left][color=rgb(34, 34, 34)][font="]Capacitor is a kind of energy storage element, which has the characteristics of "blocking direct current and passing alternating current, and passing h...
Aguilera Energy Infrastructure?

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 289  1335  2429  59  2277  6  27  49  2  46 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号