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DJLXT972MPEA4

Description
DATACOM, ETHERNET TRANSCEIVER, PQFP48
CategoryTopical application    Wireless rf/communication   
File Size659KB,92 Pages
ManufacturerIntel
Websitehttp://www.intel.com/
Download Datasheet Parametric View All

DJLXT972MPEA4 Overview

DATACOM, ETHERNET TRANSCEIVER, PQFP48

DJLXT972MPEA4 Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals48
Maximum operating temperature70 Cel
Minimum operating temperature0.0 Cel
Rated supply voltage3.3 V
Processing package descriptionROHS COMPLIANT, LQFP-48
stateACTIVE
packaging shapeSQUARE
Package SizeFLATPACK, LOW PROFILE, FINE PITCH
surface mountYes
Terminal formGULL WING
Terminal spacing0.5000 mm
Terminal locationQUAD
Packaging MaterialsPLASTIC/EPOXY
Temperature levelCOMMERCIAL
Communication typeETHERNET TRANSCEIVER
Intel
®
LXT972M Single-Port 10/100 Mbps
PHY Transceiver
Datasheet
The Intel
®
LXT972M Single-Port 10/100 Mbps PHY Transceiver is an IEEE compliant Fast
Ethernet PHY Transceiver that directly supports both 100BASE-TX and 10BASE-T applications. It
provides a Media Independent Interface (MII) for easy attachment to 10/100 Media Access
Controllers (MACs). Both full and half-duplex operation at 10 Mbps and 100 Mbps is supported.
Operation mode can be set to auto-negotiation, parallel detection, or manual control. The device is
powered from a single 3.3V power supply.
Applications
Combination 10BASE-T/100BASE-TX
Network Interface Cards (NICs)
Wireless access points
Network printers
10/100 Personal Computer Memory Card
International Association (PCMCIA) cards
Cable Modems and Set-Top Boxes
Product Features
3.3V Operation
IEEE 802.3-compliant 10BASE-T or
100BASE-TX with integrated filters
Auto-negotiation and parallel detection
MII interface with extended register
capability
Robust baseline wander correction
Carrier Sense Multiple Access / Collision
Detection (CSMA/CD) or full-duplex
operation
JTAG boundary scan
MDIO serial port or hardware pin
configurable
Integrated, programmable LED drivers
48-pin Low-profile Quad Flat Package
RESET_L
ADDR[1:0]
MDIO
MDC
Management /
Mode Select
Logic
Power Supply
Register Set
Clock
Generator
VCC
GND
REFCLK/XI
XO
TX_EN
TXD[3:0]
TX PCS
Manchester
10
Encoder
Parallel/Serial
Converter
Scrambler
100
& Encoder
Auto
Negotiation
Register
Set
OSP
Pulse
Shaper
+
TP
Driver
TP Out
TPOP
TPON
-
TX_CLK
LED/CFG[3:1]
JTAG
5
COL
Collision
Detect
Clock
Generator
Media
Select
OSP
Adaptive EQ with
Baseline Wander
Cancellation
100TX
TDI
TDO
TMS
TCK
TRST_L
+
-
TP In
TPIP
TPIN
RX_CLK
RXD[3:0]
RX P CS
RX_DV
CRS
RX_ER
Serial-to-
Parallel
Carrier Sense Converter
Data Valid
Error Detect
10
100
Manchester
Decoder
Decoder &
Descrambler
OSP
Slicer
10BT
+
-
B3387-13
Document Number: 302875-005
Revision Date: 27-Oct-2005
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