DG508A
CMOS Analog Multiplexers
I GNS
D ES T
EW
R
OR N ENT PA
D F C EM
N DE
M M E D R E P LA
CO
08
T RE M E NDE
NO
D G4
M
O
RE C
DATASHEET
FN3137
Rev 6.00
Mar 4, 2009
The DG508A is a CMOS Monolithic 8-Channel Analog
Multiplexer, which can also be used as a demultiplexer. An
enable input is provided. When the enable input is high, a
channel is selected by the address inputs, and when low, all
channels are off.
A channel in the ON state conducts current equally well in
both directions. In the OFF state each channel blocks
voltages up to the supply rails. The address inputs and the
enable input are TTL and CMOS compatible over the full
specified operating temperature range.
The DG508A is pinout compatible with the industry standard
devices.
Features
• Low Power Consumption
• TTL and CMOS-Compatible Address and Enable Inputs
• 44V Maximum Power Supply Rating
• High Latch-Up Immunity
• Break-Before-Make Switching
• Alternate Source
• Pb-Free Available (RoHS Compliant)
Applications
• Data Acquisition Systems
• Communication Systems
• Signal Multiplexing/Demultiplexing
• Audio Signal Multiplexing
Ordering Information
PART NUMBER
DG508AAK
DG508ABK
DG508ACJ
DG508ACJZ
(See Note)
TEMP.
RANGE (°C)
-55 to +125
-25 to +85
0 to +70
0 to +70
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld PDIP
16 Ld PDIP
(Pb-free)
PKG.
DWG. #
F16.3
F16.3
E16.3
E16.3
Truth Table
DG508A
A
2
X
0
0
0
A
1
X
0
0
1
1
0
0
1
1
A
0
X
0
1
0
1
0
1
0
1
EN
0
1
1
1
1
1
1
1
1
ON SWITCH
None
1
2
3
4
5
6
7
8
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020C.
Pinout
DG508A (PDIP, CERDIP)
TOP VIEW
A
0
1
16 A
1
15 A
2
14 GND
13 V+
12 S
5
11 S
6
10 S
7
9 S
8
0
1
1
1
1
EN 2
V-
S
1
S
2
S
3
S
4
3
4
5
6
7
A
0
, A
1
, A
2
, EN
Logic “1” = V
AH
2.4V,
Logic “0” = V
AL
0.8V
D 8
FN3137 Rev 6.00
Mar 4, 2009
Page 1 of 9
DG508A
Functional Diagram
DG508A
S
1
S
2
S
3
S
4
S
5
S
6
S
7
S
8
A
0
A
1
A
2
EN (ENABLE INPUT)
D
ADDRESS DECODER
1 OF 8
3 Line Binary Address Inputs
(1 0 1) and EN = 1
Above example shows channel 6 turned ON.
Schematic Diagram
V+
V+
S
X
LOGIC TRIP
POINT REF
GND
LOGIC A
X
INPUT OR EN
V-
LOGIC INTERFACE
AND LEVEL SHIFTER
+
DECODER
A
X
-
D
X
TYPICAL
SWITCH
FN3137 Rev 6.00
Mar 4, 2009
Page 2 of 9
DG508A
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V
Digital Inputs, V
S
, V
D
(Note 1) . . . . . . . . . . . . . (V- -2V) To (V+ +2V)
Continuous Current, (Any Terminal Except S or D) . . . . . . . . . 30mA
Continuous Current, (S or D) . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Peak Current, S or D (Pulsed 1ms, 10% Duty Cycle Max) . . . . . 40mA
Thermal Information
Thermal Resistance (Typical, Note 2)
JA
(
o
C/W)
JC
(
o
C/W)
16 Ld CERDIP Package. . . . . . . . . . . .
75
20
16 Ld PDIP Package . . . . . . . . . . . . . .
90
N/A
Maximum Junction Temperature
CERDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .175
o
C
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150
o
C
Maximum Storage Temperature
“A” and “B” Suffix . . . . . . . . . . . . . . . . . . . . . . . . . -65
o
C to 150
o
C
“C” Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65
o
C to 125
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300
o
C
Operating Conditions
Temperature Range
“A” Suffix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
“B” Suffix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25
o
C to 85
o
C
“C” Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
o
C to 70
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Signals on S
X
, D, E
N
, or A
X
exceeding V+ or V- are clamped by internal diodes. Limit diode current to maximum current ratings.
2.
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
T
A
= 25
o
C, V+ = +15V, V- = -15V, GND = 0V, V
EN
= 2.4V, Unless Otherwise Specified
“A” SUFFIX
“B” AND “C” SUFFIX
(NOTE 4) (NOTE 3) (NOTE 4) (NOTE 4) (NOTE 3) (NOTE 4)
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
-
-
-
-
-
-
-
-
-10
-
V
A
= 0V
-10
-10
-15
-
-
0.6
0.2
1
0.4
68
5
25
4
-0.002
0.006
-0.002
-0.002
-
270
230
1
-
1.5
1.0
-
-
-
-
-
10
-
-
+15
400
400
-
-
-
-
-
-
-
-
-10
-
-10
-10
-15
-
-
0.6
0.2
1
0.4
68
5
25
4
-0.002
0.006
-0.002
-0.0002
-
270
230
-
-
-
-
-
-
-
-
-
10
-
-
+15
450
450
s
s
s
s
dB
pF
pF
pC
A
A
A
A
V
PARAMETER
DYNAMIC CHARACTERISTICS
Switching Time of
Multiplexer, t
TRANSITION
Break-Before-Make
Interval, t
OPEN
Enable Turn-ON Time,
t
ON(EN)
Enable Turn-OFF Time,
t
OFF(EN)
OFF Isolation, OIRR
Source OFF Capacitance,
C
S(OFF)
Drain OFF Capacitance,
C
D(OFF)
Charge Injection, Q
Address Input Current,
Input Voltage High, I
AH
TEST CONDITIONS
See Figure 1
See Figure 3
See Figure 2
See Figure 2
V
EN
= 0V, R
L
= 1k, C
L
= 15pF,
V
S
= 7V
RMS
, f = 500kHz (Note 5)
V
S
= 0V, V
EN
= 0V, f = 140kHz
V
D
= 0V, V
EN
= 0V, f = 140kHz
See Figure 4
V
A
= 2.4V
V
A
= 15V
DIGITAL INPUT CHARACTERISTICS
Address Input Current Input V
EN
= 2.4V
Voltage Low, I
AL
V
EN
= 0V
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range,
V
ANALOG
Drain-Source ON
Resistance, r
DS(ON)
(Note 7)
Sequence Each I
S
= -200A, V
D
= +10V
Switch ON
I
S
= -200A, V
D
= -10V
V
AL
= 0.8V,
V
AH
= 2.4V
-10V
V
S
+10V
r
DS(ON)MAX
–
r
DS
ON
MIN
r
DS
ON
= -----------------------------------------------------------------------
r
DS
ON
AVG
r
DS(ON)
Matching
Between Channels
-
6
-
-
6
-
%
FN3137 Rev 6.00
Mar 4, 2009
Page 3 of 9
DG508A
Electrical Specifications
T
A
= 25
o
C, V+ = +15V, V- = -15V, GND = 0V, V
EN
= 2.4V, Unless Otherwise Specified
(Continued)
“A” SUFFIX
PARAMETER
Source OFF Leakage
Current, I
S(OFF)
Drain OFF Leakage
Current, I
D(OFF)
Drain ON Leakage Current,
I
D(ON)
V
EN
= 0V
V
EN
= 0V
TEST CONDITIONS
V
S
= +10V, V
D
= -10V
V
S
= -10V, V
D
= +10V
V
S
= -10V, V
D
= +10V
V
S
= +10V, V
D
= -10V
(Note 6)
V
D
= V
S(ALL)
= +10V
Sequence Each
V
D
= V
S(ALL)
= -10V
Switch ON
V
AL
= 0.8V,
V
AH
= 2.4V
V
EN
= 5.0V (Enabled) or
V
EN
= 0V (Standby), V
A
= 0V
“B” AND “C” SUFFIX
(NOTE 4) (NOTE 3) (NOTE 4) (NOTE 4) (NOTE 3) (NOTE 4)
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
-1
-1
-
-10
-
-10
0.002
-0.005
0.01
-0.015
0.015
-0.03
1
1
10
-
10
-
-5
-5
-
-20
-
-20
0.002
-0.005
0.01
-0.015
0.015
-0.03
5
5
20
-
20
-
nA
nA
nA
nA
nA
nA
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
Negative Supply Current, I-
-
-1.5
1.3
-0.7
2.4
-
-
-1.5
1.3
-0.7
2.4
-
mA
mA
Electrical Specifications
T
A
= Over Operating Temperature Range, V+ = +15V, V- = -15V, GND = 0V, V
EN
= 2.4V,
Unless Otherwise Specified
“A” SUFFIX
PARAMETER
DIGITAL INPUT CHARACTERISTICS
Address Input Current, Input Voltage
High, I
AH
Address Input Current Input Voltage
Low, I
AL
V
A
= 2.4V
V
A
= 15V
V
EN
= 2.4V
V
EN
= 0V
(Note 7)
TEST CONDITIONS
MIN
-30
-
(NOTE 3)
TYP
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MAX
-
30
-
-
+15
500
500
50
-
200
-
200
-
4.5
4.5
4.5
4.5
UNITS
A
A
A
A
V
nA
nA
nA
nA
nA
nA
mA
mA
mA
mA
V
A
= 0V
-30
-30
-15
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
ANALOG
Drain-Source ON Resistance, r
DS(ON)
Source OFF Leakage Current, I
S(OFF)
Drain OFF Leakage Current, I
D(OFF)
Drain ON Leakage Current, I
D(ON)
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
Negative Supply Current, I-
Positive Standby Supply Current, I+
Negative Standby Supply Current, I-
NOTES:
3. Typical values are for design aid only, not guaranteed and not subject to production testing.
4. The algebraic convention whereby the most negative value is a minimum, and the most positive value is a maximum, is used in this data sheet.
5. Off isolation = 20Log |V
S
|/|V
D
|, where V
S
= input to Off switch, and V
D
= output due to V
S
.
6. I
D(ON)
is leakage from driver into “ON” switch.
7. Parameter not tested. Parameter guaranteed by design or characterization.
V
EN
= 0V, V
A
= 0V
V
EN
= 5.0V, V
A
= 0V
-3.2
-3.2
-3.2
-3.2
Sequence Each Switch ON
V
AL
= 0.8V, V
AH
= 2.4V
V
EN
= 0V
V
EN
= 0V
I
S
= -200A, V
D
= +10V
I
S
= -200A, V
D
= -10V
V
S
= +10V, V
D
= -10V
V
S
= -10V, V
D
= +10V
V
S
= -10V, V
D
= +10V
V
S
= +10V, V
D
= -10V
(Note 6) Sequence Each Switch ON V
D
= V
S(ALL)
= +10V
V
AL
= 0.8V, V
AH
= 2.4V
V
D
= V
S(ALL)
= -10V
-
-
-
-50
-
-200
-
-200
FN3137 Rev 6.00
Mar 4, 2009
Page 4 of 9
DG508A
Test Circuits and Waveforms
+2.4V
+15V
V+
EN
DG508A
S
1
+10V
LOGIC INPUT
3V
50%
0
V
S1
S
1
ON
0.8V
S1
SWITCH
OUTPUT
V
O
t
r
< 20ns
t
f
< 20ns
S
2
THRU S
7
A
2
A
1
LOGIC
INPUT
50
-15V
A
0
GND
S
8
-10V
SWITCH
OUTPUT
V
O
1M
35pF
0
0.8V
S8
V
S8
TRANSITION
TIME
S
8
ON
TRANSITION
TIME
D
V-
FIGURE 1A. TEST CIRCUIT
FIGURE 1. SWITCHING TIME
+15V
V+
EN
DG508A
S
1
-5V
EN
FIGURE 1B. MEASUREMENT POINTS
3V
50%
0V
t
ON (EN)
t
r
< 20ns
t
f
< 20ns
50%
t
OFF (EN)
S
2
THRU S
8
A
2
A
1
A
0
EN
50
GND
V-
-15V
D
1k
SWITCH
OUTPUT
V
O
35pF
SWITCH
OUTPUT
V
O
0V
0.1V
O
V
O
0.9V
O
FIGURE 2A. TEST CIRCUIT
FIGURE 2. ENABLE TIMES
+2.4V
V+
EN
A
0
A
1
A
2
D
GND
50
-15V
V-
1k
35pF
SWITCH
OUTPUT
V
O
S
1
THRU S
8
DG508A
+5V (V
S
)
LOGIC
INPUT
+15V
FIGURE 2B. MEASUREMENT POINTS
3V
0V
t
r
< 20ns
t
f
< 20ns
V
S
SWITCH
OUTPUT
V
O
0V
t
OPEN
50%
50%
LOGIC
INPUT
FIGURE 3A. TEST CIRCUIT
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3. BREAK-BEFORE-MAKE INTERVAL
FN3137 Rev 6.00
Mar 4, 2009
Page 5 of 9
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