DFS04M datasheet, PDF - EEWORLD Datasheet

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DFS04M: Description1 A, 400 V, SILICON, SIGNAL DIODE, DO-41; Categorysemiconductor Discrete semiconductor; File Size312KB，42 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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DFS04M Overview

1 A, 400 V, SILICON, SIGNAL DIODE, DO-41

DFS04M Parametric

Parameter Name	Attribute value
Number of terminals	2
Number of components	1
Processing package description	CASE R-1, 2 PIN
state	ACTIVE
packaging shape	round
Package Size	LONG FORM
Terminal form	Wire
Terminal location	AXIAL
Packaging Materials	UNSPECIFIED
structure	single
Shell connection	isolation
Diode component materials	silicon
Diode type	Signal diode
Maximum repetitive peak reverse voltage	400 V
Maximum average forward current	1 A

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AN1262

APPLICATION NOTE

OFFLINE FLYBACK CONVERTERS DESIGN

METHODOLOGY WITH THE L6590 FAMILY

by Claudio Adragna

The design of flyback converters is quite a demanding task that requires SMPS engineers to cope with sev-

eral problem areas such as magnetics, control loop analysis, power devices, as well as regulations concern-

ing safety, EMC and the emerging standby consumption requirements. Lots of variable are involved and

complex tradeoffs are necessary to meet the goal.

In this scenario, the high-voltage monolithic switchers of the L6590 family greatly simplify the task and, at

the same time, allow to build robust and cost-effective low-power systems.

In this application note, after a review of flyback topology, a step-by-step design procedure of an offline sin-

gle-output flyback converter will be outlined. As an example, the design of the test board will be carried out

in details.

FLYBACK BASICS

Flyback operation will be illustrated with reference to the basic circuit and the waveforms of fig. 1. It is a two-

step process. During the ON-time of the switch, energy is taken from the input and stored in the primary winding

of the flyback transformer (actually, two coupled inductors). At the secondary side, the catch diode is reverse-

biased, thus the load is being supplied by the energy stored in the output bulk capacitor.

Figure 1. Flyback Topology and associated waveforms.

Vin

Vout

Vac

n:1

Vcc

DRAIN

L6590

L6590D

L6590A

OSCILLATOR

2.5 V

Clock

Max. Duty cycle

Driver

1/100

ISOLATED

FEEDBACK

VFB

E/A

PWM

Clock

LEB

OCP

Rsense

0.5 V

COMP

GND

FREQUENCY

COMPENSATION

CLOCK

∆Ip

Vdrain

Vin

n•Vout

Vdrain

DCM operation

TRANSITION

CCM operation

May 2001

1/42

AN1262 APPLICATION NOTE

CONVERTER ELECTRICAL SPECIFICATION

The starting point of the design procedure is the properties of the converter as a black-box, that is the set of data

listed in the electrical specification table (table 1). Additional requirements, such as efficiency at zero load or

line/load regulation or maximum junction temperature, etc., can be added to that list and their impact will be con-

sidered where appropriate.

Mains Voltage: Range and Frequency.

There are basically the three possible options listed in table 2,

where a variation of ± 20% is assumed, according to common practice. There are exceptions like some

distribution lines rated at 277 V

, where a ± 10% spread can be considered, or other special cases for

specific applications. Table 2 shows also the line frequency to be considered in the standard cases at

the minimum specified mains voltages. An additional specification may require the converter to be shut

down if the mains voltage falls below a "brownout level". This additional specification will be used for

setting up the brownout protection on the types where it is available.

Table 2. Mains voltage specifications

Input (V

)

110

220

WRM (Wide Range Mains)

ACmin

)

176

ACmax

)

132

264

(Hz)

Number of holdup cycles.

The holdup requirement is the ability of the converter to keep the output volt-

age in regulation even in case of mains interruption (missing cycles). This is usually specified in terms

of number of mains cycles N

. This feature is not always demanded (in which case, N

= 0), otherwise

the typical requirement is 1 mains cycle, that is N

= 1. It impacts on the input bulk capacitor selection.

Output voltage tolerance.

It can be expressed either in absolute value or as a percentage of the nominal

voltage. This requirement, as well as the ones on line and load regulation, if specified, will affect the

choice of the feedback technique (primary or secondary).

Output voltage ripple.

The ripple superimposed on top of the DC output voltage is specified as the peak-

to-peak amplitude and includes both low frequency (at 2·f

) and high frequency (f

) component.

Switching noise due to parasitics of the printed circuit board and random noise are beyond the scope

of this procedure. This requirement, if tight, may require the use of an additional filtering cell at the out-

put.

Converter Efficiency.

The efficiency is, by definition, the ratio of the output power to the input power.

This figure is strongly dependent on the output voltage, because of the losses on the secondary diode.

It should be set based on experience, using numbers of similar converters as a reference. As a rule of

thumb, 75% (η = 0.75) can be used for a low voltage output (3.3 V or 5 V) and 80% (η = 0.8) for higher

output voltages (12 V and above).

PRE-DESIGN CHOICES

Before starting the design calculations of the various parts of the converter, some parameters not defined at the

"black-box level" need to be fixed. There is some degree of freedom in the selection of these parameters, pro-

vided some constraints are taken into account.

Reflected Voltage.

In principle, the reflected voltage should be as high as possible. In fact this leads to

a greater duty cycle, which minimizes the RMS current through the IC's MOSFET for a given power

throughput. There are two possible limitations to the maximum reflected voltage. One is the maximum

duty cycle D

max

allowed by the devices (67% min.); some margin should be considered for load tran-

sients, thus the reflected voltage should be such that the maximum duty cycle (at minimum input voltage

3/42

AN1262 APPLICATION NOTE

and maximum output power) does not exceed 62-64%. The other limitation is that the sum of the max-

imum input voltage, reflected voltage and overvoltage spike - due to the leakage inductance - must be

below the breakdown of the internal MOSFET (700 V min.). Some margin needs also to be considered:

at least 50V is recommended to take the forward recovery of the diode of the clamp circuit and param-

eter spread into account. Figure 2 illustrates schematically how the drain voltage is apportioned. The

suggested value of V

is 130 V: it leads to a maximum drain voltage slightly exceeding 500 V in 220V

or WRM applications, and about 320 V in 110 V

application, thus leaving enough room for an efficient

leakage inductance demagnetization (see below). The maximum duty cycle will be about 60% in

110V

and WRM applications, and close to 36% in 220 V

applications.

Figure 2. Drain voltage composition.

Clamp Diode

forward recovery

700 V

≤

650 V

504 V

317 V

Leak. Inductance resonates

with drain capacitance

Leak. Inductance

demagnetization

margin

spike

Transformer

demagnetised

Current flows at the

secondary side

374 V

187 V

Prim. Inductance resonates

with drain capacitance

Vin

OFF

Leakage inductance overvoltage.

The energy stored in the mutual inductance of the transformer at the

primary side is not completely transferred to the secondary, after MOSFET turn-off, until the leakage

inductance is demagnetized. This delays and makes inefficient the energy transfer from primary to sec-

ondary. To minimize this noxious effect the voltage across the leakage inductance (the leakage induct-

ance spike) that resets the inductance itself should be as high as possible. Obviously, this is limited by

the maximum allowable drain voltage. With the reflected voltage selected as previously discussed, it is

possible to allow about 140 V extra voltage in 220 V

or WRM applications and much more in 110 V

applications (see fig. 2). This will affect the design of the clamp circuit.

Transformer efficiency.

By definition, it is the ratio of the power delivered by the secondary winding to

the power entering the primary. The secondary power includes the converter output power and the one

dissipated in the secondary rectifier. Besides the secondary one, the primary power includes the one

dissipated inside the transformer and that not transferred to the secondary side and dissipated on the

leakage inductance. For typical transformers used in converters based on the L6590 family IC's, typical

values of efficiency ranges between 88% and 95%, depending on the power level and on the construc-

tion technique. Efficiency increases with the power level and by using winding interleaving construction

technique. For consistency, check that the input power of the transformer be less than the converter

input power.

Device supply voltage.

The supply voltage range of the IC spans from 7 to 16.5 V. Such a wide range

is envisaged to accommodate the variation that the voltage generated by the self-supply winding may

4/42

DFS04M Related Products

	DFS04M	1N4004	1N4005	AN1262	DF04M	KBP105G	KBP104G	DFS06M
Description	1 A, 400 V, SILICON, SIGNAL DIODE, DO-41	1 A, 400 V, SILICON, SIGNAL DIODE, DO-41	1 A, 600 V, SILICON, SIGNAL DIODE, DO-41	1 A, 400 V, SILICON, SIGNAL DIODE, DO-41	1 A, 400 V, SILICON, BRIDGE RECTIFIER DIODE	1 A, 600 V, SILICON, BRIDGE RECTIFIER DIODE	1 A, 400 V, SILICON, BRIDGE RECTIFIER DIODE	1 A, 400 V, SILICON, SIGNAL DIODE, DO-41
Number of components	1	1	1	1	4	-	-	1
Diode type	Signal diode	RECTIFIER DIODE	RECTIFIER DIODE	Signal diode	bridge rectifier diode	-	-	Signal diode
Maximum repetitive peak reverse voltage	400 V	400 V	600 V	400 V	400 V	-	-	400 V

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